Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/arm/tcg/translate-a64.c | 22 ++++++++++++++++++++++
target/arm/tcg/a64.decode | 5 +++++
2 files changed, 27 insertions(+)
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index b70ae5befd..bb92bdc296 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -8201,6 +8201,28 @@ static bool trans_PACGA(DisasContext *s, arg_rrr *a)
return false;
}
+static bool gen_rrr(DisasContext *s, arg_rrr_sf *a, ArithTwoOp fn)
+{
+ TCGv_i64 tcg_rm = cpu_reg(s, a->rm);
+ TCGv_i64 tcg_rn = cpu_reg(s, a->rn);
+ TCGv_i64 tcg_rd = cpu_reg(s, a->rd);
+
+ fn(tcg_rd, tcg_rn, tcg_rm);
+ if (!a->sf) {
+ tcg_gen_ext32u_i64(tcg_rd, tcg_rd);
+ }
+ return true;
+}
+
+TRANS_FEAT(SMAX, aa64_cssc, gen_rrr, a,
+ a->sf ? tcg_gen_smax_i64 : gen_smax32_i64)
+TRANS_FEAT(SMIN, aa64_cssc, gen_rrr, a,
+ a->sf ? tcg_gen_smin_i64 : gen_smin32_i64)
+TRANS_FEAT(UMAX, aa64_cssc, gen_rrr, a,
+ a->sf ? tcg_gen_umax_i64 : gen_umax32_i64)
+TRANS_FEAT(UMIN, aa64_cssc, gen_rrr, a,
+ a->sf ? tcg_gen_umin_i64 : gen_umin32_i64)
+
typedef void ArithOneOp(TCGv_i64, TCGv_i64);
static bool gen_rr(DisasContext *s, int rd, int rn, ArithOneOp fn)
diff --git a/target/arm/tcg/a64.decode b/target/arm/tcg/a64.decode
index c1811b0274..a886b3ba4c 100644
--- a/target/arm/tcg/a64.decode
+++ b/target/arm/tcg/a64.decode
@@ -708,6 +708,11 @@ GMI 1 00 11010110 ..... 000101 ..... .....
@rrr
PACGA 1 00 11010110 ..... 001100 ..... ..... @rrr
+SMAX . 00 11010110 ..... 011000 ..... ..... @rrr_sf
+SMIN . 00 11010110 ..... 011010 ..... ..... @rrr_sf
+UMAX . 00 11010110 ..... 011001 ..... ..... @rrr_sf
+UMIN . 00 11010110 ..... 011011 ..... ..... @rrr_sf
+
# Data Processing (1-source)
@rr . .......... ..... ...... rn:5 rd:5 &rr
--
2.43.0
