On Wed, Jul 16, 2025 at 11:54:16AM +0200, Luc Michel wrote:
> The CRL connects to various devices through link properties to be able
> to reset them. The connections were dropped during the SoC refactoring.
> Reintroduce them now.
>
> Rely on the QOM tree to retrieve the devices to connect. The component
> parts of the device names are chosen to match the properties on the CRL.
>
> Signed-off-by: Luc Michel <luc.mic...@amd.com>
Reviewed-by: Francisco Iglesias <francisco.igles...@amd.com>
> ---
> hw/arm/xlnx-versal.c | 31 ++++++++++++++++++++++++++++++-
> 1 file changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
> index 5151822ad56..796b4911a02 100644
> --- a/hw/arm/xlnx-versal.c
> +++ b/hw/arm/xlnx-versal.c
> @@ -1473,21 +1473,50 @@ static void versal_create_cfu(Versal *s, const struct
> VersalCfuMap *map)
> sysbus_realize_and_unref(sbd, &error_fatal);
> memory_region_add_subregion(&s->mr_ps, map->cfu_sfr,
> sysbus_mmio_get_region(sbd, 0));
> }
>
> +static inline void crl_connect_dev(Object *crl, Object *dev)
> +{
> + const char *prop = object_get_canonical_path_component(dev);
> +
> + /* The component part of the device path matches the CRL property name */
> + object_property_set_link(crl, prop, dev, &error_abort);
> +}
> +
> +static inline void crl_connect_dev_by_name(Versal *s, Object *crl,
> + const char *name, size_t num)
> +{
> + size_t i;
> +
> + for (i = 0; i < num; i++) {
> + Object *dev = versal_get_child_idx(s, name, i);
> +
> + crl_connect_dev(crl, dev);
> + }
> +}
> +
> static inline void versal_create_crl(Versal *s)
> {
> const VersalMap *map;
> const char *crl_class;
> DeviceState *dev;
> + Object *obj;
>
> map = versal_get_map(s);
>
> crl_class = TYPE_XLNX_VERSAL_CRL;
> dev = qdev_new(crl_class);
> - object_property_add_child(OBJECT(s), "crl", OBJECT(dev));
> + obj = OBJECT(dev);
> + object_property_add_child(OBJECT(s), "crl", obj);
> +
> + crl_connect_dev_by_name(s, obj, "rpu-cluster/rpu",
> + map->rpu.num_cluster * map->rpu.num_core);
> + crl_connect_dev_by_name(s, obj, map->zdma[0].name,
> map->zdma[0].num_chan);
> + crl_connect_dev_by_name(s, obj, "uart", map->num_uart);
> + crl_connect_dev_by_name(s, obj, "gem", map->num_gem);
> + crl_connect_dev_by_name(s, obj, "usb", map->num_usb);
>
> sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_abort);
>
> memory_region_add_subregion(&s->mr_ps, map->crl.addr,
> sysbus_mmio_get_region(SYS_BUS_DEVICE(dev),
> 0));
> --
> 2.50.0
>
