On 30.07.2025 04:01, alistai...@gmail.com wrote:
From: Alistair Francis <alistair.fran...@wdc.com>

The following changes since commit 9b80226ece693197af8a981b424391b68b5bc38e:

   Update version for the v10.1.0-rc1 release (2025-07-29 13:00:41 -0400)

are available in the Git repository at:

   https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20250730-2

for you to fetch changes up to 86bc3a0abf10072081cddd8dff25aa72c60e67b8:

   target/riscv: Restrict midelegh access to S-mode harts (2025-07-30 10:59:26 
+1000)

----------------------------------------------------------------
Third RISC-V PR for 10.1

* Fix pmp range wraparound on zero
* Update FADT and MADT versions in ACPI tables
* Fix target register read when source is inactive
* Add riscv_hwprobe entry to linux-user strace list
* Do not call GETPC() in check_ret_from_m_mode()
* Revert "Generate strided vector loads/stores with tcg nodes."
* Fix exception type when VU accesses supervisor CSRs
* Restrict mideleg/medeleg/medelegh access to S-mode harts
* Restrict midelegh access to S-mode harts

----------------------------------------------------------------
Daniel Henrique Barboza (3):
       linux-user/strace.list: add riscv_hwprobe entry
       target/riscv: do not call GETPC() in check_ret_from_m_mode()
       riscv: Revert "Generate strided vector loads/stores with tcg nodes."

Jay Chang (2):
       target/riscv: Restrict mideleg/medeleg/medelegh access to S-mode harts
       target/riscv: Restrict midelegh access to S-mode harts

Sunil V L (3):
       bios-tables-test-allowed-diff.h: Allow RISC-V FADT and MADT changes
       hw/riscv/virt-acpi-build.c: Update FADT and MADT versions
       tests/data/acpi/riscv64: Update expected FADT and MADT

Vac Chen (1):
       target/riscv: Fix pmp range wraparound on zero

Xu Lu (1):
       target/riscv: Fix exception type when VU accesses supervisor CSRs

Yang Jialong (1):
       intc/riscv_aplic: Fix target register read when source is inactive

Is there anything there for qemu-stable?

It looks like "Fix exception type when VU accesses supervisor CSRs" is a
good candidate, maybe "Fix pmp range wraparound on zero" too.  Something
else? "Fix target register read when source is inactive"?  The "S-mode
harts" ones?

I already picked up "do not call GETPC()" as it's been Cc'd qemu-stable
before, and I'm picking up riscv_hwprobe too, as it's trivial and fixes
a trivial omission which might be useful.  Should I pick up others I
mentioned?

Thanks,

/mjt

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