Refactor the CAN controllers creation using the VersalMap structure. Note that the connection to the CRL is removed for now and will be re-added by next commits.
The xlnx-versal-virt machine now dynamically creates the correct amount of CAN bus link properties based on the number of CAN controller advertised by the SoC. Signed-off-by: Luc Michel <luc.mic...@amd.com> --- include/hw/arm/xlnx-versal.h | 7 +-- hw/arm/xlnx-versal-virt.c | 73 ++++++++++-------------------- hw/arm/xlnx-versal.c | 86 +++++++++++++++++++++++++----------- 3 files changed, 87 insertions(+), 79 deletions(-) diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h index b01ddeb1423..007c91b596e 100644 --- a/include/hw/arm/xlnx-versal.h +++ b/include/hw/arm/xlnx-versal.h @@ -29,11 +29,11 @@ #include "hw/ssi/xlnx-versal-ospi.h" #include "hw/dma/xlnx_csu_dma.h" #include "hw/misc/xlnx-versal-crl.h" #include "hw/misc/xlnx-versal-pmc-iou-slcr.h" #include "hw/misc/xlnx-versal-trng.h" -#include "hw/net/xlnx-versal-canfd.h" +#include "net/can_emu.h" #include "hw/misc/xlnx-versal-cfu.h" #include "hw/misc/xlnx-versal-cframe-reg.h" #include "target/arm/cpu.h" #include "hw/arm/xlnx-versal-version.h" @@ -81,12 +81,10 @@ struct Versal { struct { CadenceGEMState gem[XLNX_VERSAL_NR_GEMS]; OrIRQState gem_irq_orgate[XLNX_VERSAL_NR_GEMS]; XlnxZDMA adma[XLNX_VERSAL_NR_ADMAS]; VersalUsb2 usb; - CanBusState *canbus[XLNX_VERSAL_NR_CANFD]; - XlnxVersalCANFDState canfd[XLNX_VERSAL_NR_CANFD]; } iou; /* Real-time Processing Unit. */ struct { MemoryRegion mr; @@ -139,10 +137,11 @@ struct Versal { uint32_t clk_125mhz; } phandle; struct { MemoryRegion *mr_ddr; + CanBusState **canbus; void *fdt; } cfg; }; struct VersalClass { @@ -155,10 +154,12 @@ static inline void versal_set_fdt(Versal *s, void *fdt) { g_assert(!qdev_is_realized(DEVICE(s))); s->cfg.fdt = fdt; } +int versal_get_num_can(VersalVersion version); + /* Memory-map and IRQ definitions. Copied a subset from * auto-generated files. */ #define VERSAL_GIC_MAINT_IRQ 9 #define VERSAL_TIMER_VIRT_IRQ 11 diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c index 7213ead466d..18a3ea169d0 100644 --- a/hw/arm/xlnx-versal-virt.c +++ b/hw/arm/xlnx-versal-virt.c @@ -41,15 +41,15 @@ struct VersalVirt { uint32_t ethernet_phy[2]; uint32_t clk_125Mhz; uint32_t clk_25Mhz; uint32_t usb; uint32_t dwc; - uint32_t canfd[2]; } phandle; struct arm_boot_info binfo; - CanBusState *canbus[XLNX_VERSAL_NR_CANFD]; + CanBusState **canbus; + struct { bool secure; } cfg; char *ospi_model; }; @@ -207,42 +207,10 @@ static void fdt_add_usb_xhci_nodes(VersalVirt *s) qemu_fdt_setprop_cell(s->fdt, name, "phandle", s->phandle.dwc); qemu_fdt_setprop_string(s->fdt, name, "maximum-speed", "high-speed"); g_free(name); } -static void fdt_add_canfd_nodes(VersalVirt *s) -{ - uint64_t addrs[] = { MM_CANFD1, MM_CANFD0 }; - uint32_t size[] = { MM_CANFD1_SIZE, MM_CANFD0_SIZE }; - unsigned int irqs[] = { VERSAL_CANFD1_IRQ_0, VERSAL_CANFD0_IRQ_0 }; - const char clocknames[] = "can_clk\0s_axi_aclk"; - int i; - - /* Create and connect CANFD0 and CANFD1 nodes to canbus0. */ - for (i = 0; i < ARRAY_SIZE(addrs); i++) { - char *name = g_strdup_printf("/canfd@%" PRIx64, addrs[i]); - qemu_fdt_add_subnode(s->fdt, name); - - qemu_fdt_setprop_cell(s->fdt, name, "rx-fifo-depth", 0x40); - qemu_fdt_setprop_cell(s->fdt, name, "tx-mailbox-count", 0x20); - - qemu_fdt_setprop_cells(s->fdt, name, "clocks", - s->phandle.clk_25Mhz, s->phandle.clk_25Mhz); - qemu_fdt_setprop(s->fdt, name, "clock-names", - clocknames, sizeof(clocknames)); - qemu_fdt_setprop_cells(s->fdt, name, "interrupts", - GIC_FDT_IRQ_TYPE_SPI, irqs[i], - GIC_FDT_IRQ_FLAGS_LEVEL_HI); - qemu_fdt_setprop_sized_cells(s->fdt, name, "reg", - 2, addrs[i], 2, size[i]); - qemu_fdt_setprop_string(s->fdt, name, "compatible", - "xlnx,canfd-2.0"); - - g_free(name); - } -} - static void fdt_add_fixed_link_nodes(VersalVirt *s, char *gemname, uint32_t phandle) { char *name = g_strdup_printf("%s/fixed-link", gemname); @@ -659,19 +627,22 @@ static void versal_virt_init(MachineState *machine) object_initialize_child(OBJECT(machine), "xlnx-versal", &s->soc, TYPE_XLNX_VERSAL); object_property_set_link(OBJECT(&s->soc), "ddr", OBJECT(machine->ram), &error_abort); - object_property_set_link(OBJECT(&s->soc), "canbus0", OBJECT(s->canbus[0]), - &error_abort); - object_property_set_link(OBJECT(&s->soc), "canbus1", OBJECT(s->canbus[1]), - &error_abort); + + for (i = 0; i < versal_get_num_can(VERSAL_VER_VERSAL); i++) { + g_autofree char *prop_name = g_strdup_printf("canbus%d", i); + + object_property_set_link(OBJECT(&s->soc), prop_name, + OBJECT(s->canbus[i]), + &error_abort); + } fdt_create(s); versal_set_fdt(&s->soc, s->fdt); fdt_add_gem_nodes(s); - fdt_add_canfd_nodes(s); fdt_add_gic_nodes(s); fdt_add_timer_nodes(s); fdt_add_zdma_nodes(s); fdt_add_usb_xhci_nodes(s); fdt_add_sd_nodes(s); @@ -753,30 +724,34 @@ static void versal_virt_init(MachineState *machine) } static void versal_virt_machine_instance_init(Object *obj) { VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(obj); + size_t i, num_can; + + num_can = versal_get_num_can(VERSAL_VER_VERSAL); + s->canbus = g_new0(CanBusState *, num_can); /* - * User can set canbus0 and canbus1 properties to can-bus object and connect - * to socketcan(optional) interface via command line. + * User can set canbusx properties to can-bus object and optionally connect + * to socketcan interface via command line. */ - object_property_add_link(obj, "canbus0", TYPE_CAN_BUS, - (Object **)&s->canbus[0], - object_property_allow_set_link, - 0); - object_property_add_link(obj, "canbus1", TYPE_CAN_BUS, - (Object **)&s->canbus[1], - object_property_allow_set_link, - 0); + for (i = 0; i < num_can; i++) { + g_autofree char *prop_name = g_strdup_printf("canbus%zu", i); + + object_property_add_link(obj, prop_name, TYPE_CAN_BUS, + (Object **) &s->canbus[i], + object_property_allow_set_link, 0); + } } static void versal_virt_machine_finalize(Object *obj) { VersalVirt *s = XLNX_VERSAL_VIRT_MACHINE(obj); g_free(s->ospi_model); + g_free(s->canbus); } static void versal_virt_machine_class_init(ObjectClass *oc, const void *data) { MachineClass *mc = MACHINE_CLASS(oc); diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c index 87468cbc291..5dccf231942 100644 --- a/hw/arm/xlnx-versal.c +++ b/hw/arm/xlnx-versal.c @@ -25,10 +25,11 @@ #include "target/arm/cpu-qom.h" #include "target/arm/gtimer.h" #include "system/device_tree.h" #include "hw/arm/fdt.h" #include "hw/char/pl011.h" +#include "hw/net/xlnx-versal-canfd.h" #define XLNX_VERSAL_ACPU_TYPE ARM_CPU_TYPE_NAME("cortex-a72") #define XLNX_VERSAL_RCPU_TYPE ARM_CPU_TYPE_NAME("cortex-r5f") #define GEM_REVISION 0x40070106 @@ -41,16 +42,23 @@ typedef struct VersalSimplePeriphMap { } VersalSimplePeriphMap; typedef struct VersalMap { VersalSimplePeriphMap uart[2]; size_t num_uart; + + VersalSimplePeriphMap canfd[4]; + size_t num_canfd; } VersalMap; static const VersalMap VERSAL_MAP = { .uart[0] = { 0xff000000, 18 }, .uart[1] = { 0xff010000, 19 }, .num_uart = 2, + + .canfd[0] = { 0xff060000, 20 }, + .canfd[1] = { 0xff070000, 21 }, + .num_canfd = 2, }; static const VersalMap *VERSION_TO_MAP[] = { [VERSAL_VER_VERSAL] = &VERSAL_MAP, }; @@ -284,40 +292,46 @@ static void versal_create_uart(Versal *s, if (chardev_idx == 0) { qemu_fdt_setprop_string(s->cfg.fdt, "/chosen", "stdout-path", node); } } -static void versal_create_canfds(Versal *s, qemu_irq *pic) +static void versal_create_canfd(Versal *s, const VersalSimplePeriphMap *map, + CanBusState *bus) { - int i; - uint32_t irqs[] = { VERSAL_CANFD0_IRQ_0, VERSAL_CANFD1_IRQ_0}; - uint64_t addrs[] = { MM_CANFD0, MM_CANFD1 }; + SysBusDevice *sbd; + MemoryRegion *mr; + g_autofree char *node; + const char compatible[] = "xlnx,canfd-2.0"; + const char clocknames[] = "can_clk\0s_axi_aclk"; - for (i = 0; i < ARRAY_SIZE(s->lpd.iou.canfd); i++) { - char *name = g_strdup_printf("canfd%d", i); - SysBusDevice *sbd; - MemoryRegion *mr; + sbd = SYS_BUS_DEVICE(qdev_new(TYPE_XILINX_CANFD)); + object_property_add_child(OBJECT(s), "canfd[*]", OBJECT(sbd)); - object_initialize_child(OBJECT(s), name, &s->lpd.iou.canfd[i], - TYPE_XILINX_CANFD); - sbd = SYS_BUS_DEVICE(&s->lpd.iou.canfd[i]); + object_property_set_int(OBJECT(sbd), "ext_clk_freq", + 25 * 1000 * 1000 , &error_abort); - object_property_set_int(OBJECT(&s->lpd.iou.canfd[i]), "ext_clk_freq", - XLNX_VERSAL_CANFD_REF_CLK , &error_abort); + object_property_set_link(OBJECT(sbd), "canfdbus", OBJECT(bus), + &error_abort); - object_property_set_link(OBJECT(&s->lpd.iou.canfd[i]), "canfdbus", - OBJECT(s->lpd.iou.canbus[i]), - &error_abort); + sysbus_realize_and_unref(sbd, &error_fatal); - sysbus_realize(sbd, &error_fatal); + mr = sysbus_mmio_get_region(sbd, 0); + memory_region_add_subregion(&s->mr_ps, map->addr, mr); - mr = sysbus_mmio_get_region(sbd, 0); - memory_region_add_subregion(&s->mr_ps, addrs[i], mr); + versal_sysbus_connect_irq(s, sbd, 0, map->irq); - sysbus_connect_irq(sbd, 0, pic[irqs[i]]); - g_free(name); - } + node = versal_fdt_add_simple_subnode(s, "/canfd", map->addr, 0x10000, + compatible, sizeof(compatible)); + qemu_fdt_setprop_cell(s->cfg.fdt, node, "rx-fifo-depth", 0x40); + qemu_fdt_setprop_cell(s->cfg.fdt, node, "tx-mailbox-count", 0x20); + qemu_fdt_setprop_cells(s->cfg.fdt, node, "clocks", + s->phandle.clk_25mhz, s->phandle.clk_25mhz); + qemu_fdt_setprop(s->cfg.fdt, node, "clock-names", + clocknames, sizeof(clocknames)); + qemu_fdt_setprop_cells(s->cfg.fdt, node, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, map->irq, + GIC_FDT_IRQ_FLAGS_LEVEL_HI); } static void versal_create_usbs(Versal *s, qemu_irq *pic) { DeviceState *dev; @@ -1046,11 +1060,14 @@ static void versal_realize(DeviceState *dev, Error **errp) for (i = 0; i < map->num_uart; i++) { versal_create_uart(s, &map->uart[i], i); } - versal_create_canfds(s, pic); + for (i = 0; i < map->num_canfd; i++) { + versal_create_canfd(s, &map->canfd[i], s->cfg.canbus[i]); + } + versal_create_usbs(s, pic); versal_create_gems(s, pic); versal_create_admas(s, pic); versal_create_sds(s, pic); versal_create_pmc_apb_irq_orgate(s, pic); @@ -1074,28 +1091,43 @@ static void versal_realize(DeviceState *dev, Error **errp) memory_region_add_subregion_overlap(&s->fpd.apu.mr, 0, &s->mr_ps, 0); memory_region_add_subregion_overlap(&s->lpd.rpu.mr, 0, &s->lpd.rpu.mr_ps_alias, 0); } +int versal_get_num_can(VersalVersion version) +{ + const VersalMap *map = VERSION_TO_MAP[version]; + + return map->num_canfd; +} + static void versal_base_init(Object *obj) { Versal *s = XLNX_VERSAL_BASE(obj); + size_t i, num_can; memory_region_init(&s->fpd.apu.mr, obj, "mr-apu", UINT64_MAX); memory_region_init(&s->lpd.rpu.mr, obj, "mr-rpu", UINT64_MAX); memory_region_init(&s->mr_ps, obj, "mr-ps-switch", UINT64_MAX); memory_region_init_alias(&s->lpd.rpu.mr_ps_alias, OBJECT(s), "mr-rpu-ps-alias", &s->mr_ps, 0, UINT64_MAX); + + num_can = versal_get_map(s)->num_canfd; + s->cfg.canbus = g_new0(CanBusState *, num_can); + + for (i = 0; i < num_can; i++) { + g_autofree char *prop_name = g_strdup_printf("canbus%zu", i); + + object_property_add_link(obj, prop_name, TYPE_CAN_BUS, + (Object **) &s->cfg.canbus[i], + object_property_allow_set_link, 0); + } } static const Property versal_properties[] = { DEFINE_PROP_LINK("ddr", Versal, cfg.mr_ddr, TYPE_MEMORY_REGION, MemoryRegion *), - DEFINE_PROP_LINK("canbus0", Versal, lpd.iou.canbus[0], - TYPE_CAN_BUS, CanBusState *), - DEFINE_PROP_LINK("canbus1", Versal, lpd.iou.canbus[1], - TYPE_CAN_BUS, CanBusState *), }; static void versal_base_class_init(ObjectClass *klass, const void *data) { DeviceClass *dc = DEVICE_CLASS(klass); -- 2.50.0