On 2025/07/01 20:30, Liu Jaloo wrote:
in the source code "hw/net/e1000.c"
[LEDCTL] = 0x602,
maybe should be:
[LEDCTL] = 0x07068302,
according to the "*Table 13-60. LED Control Bit Description*" of the doc:
https://www.intel.com/content/dam/doc/manual/pci-pci-x-family-gbe-
controllers-software-dev-manual.pdf <https://www.intel.com/content/dam/
doc/manual/pci-pci-x-family-gbe-controllers-software-dev-manual.pdf>
0x602 is EEPROM default value, just for LED0 and LED2, according to the
same doc:
*Table 5-15. LED Configuration Defaults*
I think you are right. Can you submit a patch to fix it?
Regards,
Akihiko Odaki
