Per SDM, 80000008H EAX Linear/Physical Address size. Bits 07-00: #Physical Address Bits*. Bits 15-08: #Linear Address Bits. Bits 31-16: Reserved = 0. EBX Bits 08-00: Reserved = 0. Bit 09: WBNOINVD is available if 1. Bits 31-10: Reserved = 0. ECX Reserved = 0. EDX Reserved = 0.
ECX/EDX in CPUID 0x80000008 leaf are reserved. Encode these 2 registers as 0 for Intel. Signed-off-by: Zhao Liu <zhao1....@intel.com> --- target/i386/cpu.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 6d590a9af389..5d5a227d4c8a 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -8391,6 +8391,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, *eax |= (cpu->guest_phys_bits << 16); } *ebx = env->features[FEAT_8000_0008_EBX]; + + if (cpu->vendor_cpuid_only_v2 && IS_INTEL_CPU(env)) { + *ecx = *edx = 0; + break; + } + if (threads_per_pkg > 1) { /* * Bits 15:12 is "The number of bits in the initial -- 2.34.1