On Sun, 22 Jun 2025 at 00:58, Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Rename to USDOT_zzzz_4s and force size=2 during decode.
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
> ---
> target/arm/tcg/translate-sve.c | 4 ++--
> target/arm/tcg/sve.decode | 2 +-
> 2 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c
> index 20b73cd572..29b6f09260 100644
> --- a/target/arm/tcg/translate-sve.c
> +++ b/target/arm/tcg/translate-sve.c
> @@ -7105,8 +7105,8 @@ static gen_helper_gvec_4 * const sqrdcmlah_fns[] = {
> TRANS_FEAT(SQRDCMLAH_zzzz, aa64_sve2, gen_gvec_ool_zzzz,
> sqrdcmlah_fns[a->esz], a->rd, a->rn, a->rm, a->ra, a->rot)
>
> -TRANS_FEAT(USDOT_zzzz, aa64_sve_i8mm, gen_gvec_ool_arg_zzzz,
> - a->esz == 2 ? gen_helper_gvec_usdot_4b : NULL, a, 0)
> +TRANS_FEAT(USDOT_zzzz_4s, aa64_sve_i8mm, gen_gvec_ool_arg_zzzz,
> + gen_helper_gvec_usdot_4b, a, 0)
>
> TRANS_FEAT_NONSTREAMING(AESMC, aa64_sve2_aes, gen_gvec_ool_zz,
> gen_helper_crypto_aesmc, a->rd, a->rd, 0)
> diff --git a/target/arm/tcg/sve.decode b/target/arm/tcg/sve.decode
> index bd06a1bdf0..7ed186c9bd 100644
> --- a/target/arm/tcg/sve.decode
> +++ b/target/arm/tcg/sve.decode
> @@ -1599,7 +1599,7 @@ SQRDCMLAH_zzzz 01000100 esz:2 0 rm:5 0011 rot:2 rn:5
> rd:5 ra=%reg_movprfx
>
> ## SVE mixed sign dot product
>
> -USDOT_zzzz 01000100 .. 0 ..... 011 110 ..... ..... @rda_rn_rm
> +USDOT_zzzz_4s 01000100 10 0 ..... 011 110 ..... ..... @rda_rn_rm_e0
This sets esz to 0, when it used to be 2. The helper function
looks like it looks at the simd_oprsz() so I think this is
wrong as well as inconsistent with the esz we use for _4s
insns in the previous patch.
-- PMM
