On 6/23/25 08:25, Peter Maydell wrote:
On Sun, 22 Jun 2025 at 00:58, Richard Henderson <richard.hender...@linaro.org> wrote:Signed-off-by: Richard Henderson <richard.hender...@linaro.org> --- target/arm/tcg/translate-sme.c | 65 ++++++++++++++++++++++++++++++++++ target/arm/tcg/sme.decode | 36 +++++++++++++++++++ 2 files changed, 101 insertions(+) diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index 0e05153924..617621d663 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -550,6 +550,37 @@ TRANS_FEAT(SRSHL_n1, aa64_sme2, do_z2z_n1, a, gen_gvec_srshl) TRANS_FEAT(URSHL_n1, aa64_sme2, do_z2z_n1, a, gen_gvec_urshl) TRANS_FEAT(SQDMULH_n1, aa64_sme2, do_z2z_n1, a, gen_gvec_sve2_sqdmulh) +static bool do_z2z_nn(DisasContext *s, arg_z2z_en *a, GVecGen3Fn *fn) +{ + int esz, dn, dm, vsz, n; + + if (!sme_sm_enabled_check(s)) { + return true; + } + + esz = a->esz; + n = a->n; + dn = a->zdn; + dm = a->zm; + vsz = streaming_vec_reg_size(s); + + for (int i = 0; i < n; i++) { + int dofs = vec_full_reg_offset(s, dn + i); + int mofs = vec_full_reg_offset(s, dm + i); + + fn(esz, dofs, dofs, mofs, vsz, vsz); + } + return true; +}Don't we need to handle Dn and Dm overlapping here, the way we did in the previous patch ?
No, because Zdn and Zm are both aligned, and both incremented. Zm+i is fully consumed as Zdn+i is written. r~
-- PMM
