On 2025/6/17 上午9:58, gaosong wrote:
在 2025/6/11 下午2:36, Bibo Mao 写道:


On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao <gaos...@loongson.cn>
---
  hw/loongarch/virt.c | 18 +++++++++++++-----
  1 file changed, 13 insertions(+), 5 deletions(-)

diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 718b5b4f92..6b670e7936 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -503,11 +503,19 @@ static void virt_irq_init(LoongArchVirtMachineState *lvms, MachineState *ms)
      qdev_prop_set_uint32(pch_msi, "msi_irq_num", num);
      d = SYS_BUS_DEVICE(pch_msi);
      sysbus_realize_and_unref(d, &error_fatal);
-    sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
-    for (i = 0; i < num; i++) {
-        /* Connect pch_msi irqs to extioi */
-        qdev_connect_gpio_out(DEVICE(d), i,
-                              qdev_get_gpio_in(extioi, i + start));
+    if (virt_is_avecintc_enabled(lvms)) {
+        for (i = 0; i < num; i++) {
+            /* Connect pch_msi irqs to avec */
+            qdev_connect_gpio_out(DEVICE(d), i,
+                                 qdev_get_gpio_in(avec, i + start));
one parent irqline for avec is enough. Variable num is the number allocated for pch_msi when connecting to extioi. So variable num is meaningless with avec.

hi,
here is  pch_msi  [start-256] gpio_out  connect to avec gpio_in [start, 256], not the avec connect to cpu.
pch_msi is always connected to eiointc, and it is not connected to avec gpio_in. There is two MSI controllers coexisting together: pch_msi and avec, guest OS can choose use one of them or both.

Regards
Bibo Mao

and  I think  the 'one parent lrqline for avec'  is avec connect cpu gpio_in INT_AVEC at patch 6
'qdev_connect_gpio_out(avec, cpu, qdev_get_gpio_in(cpudev, INT_AVEC));'
or all pch_msi gpio_out connect one avec gpio_in ?  I'm a little confused here.

Also there is no msi memory map region for avec such as sysbus_mmio_map() in the following.

emm, the region add at patch 6
   memory_region_add_subregion(get_system_memory(), VIRT_PCH_MSI_ADDR_LOW,
sysbus_mmio_get_region(SYS_BUS_DEVICE(avec), 0));

I will adjust the patch order and the code order.

+        }
+    } else {In the first, I think irqchip avec and pch_msi can coexist together.
MSI memory area for avec is
   [VIRT_PCH_MSI_ADDR_LOW - 0x100000, VIRT_PCH_MSI_ADDR_LOW)
yes, you're right. memory area for avec should be 2fe0000000-2ff0000000;
for pch_msi is
   [VIRT_PCH_MSI_ADDR_LOW, VIRT_PCH_MSI_ADDR_LOW + 0x8)

For parent line, AVEC is connected to CPU MSGINT BIT14 and pch_msi is
connected to extioi.

So they can coexists together, it only depends on how guest kernel use MSI controller.

emm,  in case avec exists we should pick avec.

thanks.
Song Gao.
Regards
Bibo Mao
+        sysbus_mmio_map(d, 0, VIRT_PCH_MSI_ADDR_LOW);
+        for (i = 0; i < num; i++) {
+            /* Connect pch_msi irqs to extioi */
+            qdev_connect_gpio_out(DEVICE(d), i,
+                                  qdev_get_gpio_in(extioi, i + start));
+        }
      }
        virt_devices_init(pch_pic, lvms);



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