On Mon, Jun 9, 2025 at 11:20 PM Ben Dooks <ben.do...@codethink.co.uk> wrote: > > Change to using TYPE_RISCV_CPU_CVA6 once this is merged.
You can also just change the patch order to not require this patch > > Signed-off-by: Ben Dooks <ben.do...@codethink.co.uk> Reviewed-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > hw/riscv/cva6.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/hw/riscv/cva6.c b/hw/riscv/cva6.c > index 3adfa8b5cc..e6fd0ebafc 100644 > --- a/hw/riscv/cva6.c > +++ b/hw/riscv/cva6.c > @@ -83,8 +83,7 @@ static void cva6_machine_class_init(ObjectClass *oc, const > void *data) > mc->init = cva6_machine_init; > mc->max_cpus = 1; > mc->default_ram_id = "cva6.ram"; > - /* start with "max" cpu type until we sort out CVA6 type */ > - mc->default_cpu_type = TYPE_RISCV_CPU_MAX; > + mc->default_cpu_type = TYPE_RISCV_CPU_CVA6; > mc->default_ram_size = cva6_memmap[CVA6_DRAM].size; > }; > > -- > 2.37.2.352.g3c44437643 > >
