Overview
============
Note: No changes from v7, fixed minor merge conflicts on rebase.
Add support for Power11 powernv machine type.
As Power11 core is same as Power10, hence much of the code has been reused
from Power10.
Split Powernv11 chip/machine code into commits introducing:
chip,machine,xive,phb
This is to try to keep the code smaller in each commit, but can squash the
xive/phb commits into respective chip/machine commit
Power11 PSeries already added in QEMU in:
commit 273db89bcaf4 ("ppc/pseries: Add Power11 cpu type")
Note: Also added a patch proposing myself as a reviewer.
Git Tree for Testing
====================
QEMU: https://github.com/adi-g15-ibm/qemu/tree/p11-powernv-v8
Has been tested with following cases:
* '-M powernv' / '-M powernv10' / '-M powernv11'
* '-smp' option tested
skiboot with Power11 support: https://github.com/open-power/skiboot, since
commit 785a5e3
Linux with Power11 support: https://github.com/torvalds/linux, since v6.9-rc1
Changelog
=========
v8:
+ rebase to upstream
+ propose myself as a powernv reviewer
v7
(https://lore.kernel.org/qemu-devel/20250327200738.1524401-1-adit...@linux.ibm.com/):
+ use Power10 models of homer, sbe, occ, psi, lpc. As they are same.
+ switch powernv tests to use buildroot images instead of op-build images
+ add functional test for powernv11
- remove dynamic sysbus device for PHBs, so no more dynamic number of
PHBs in Power11 as it became complex to handle it and not much used
v6
(https://lore.kernel.org/qemu-devel/20250325112319.927190-1-adit...@linux.ibm.com/):
+ make Pnv11Chip's parent as PnvChip, instead of Pnv10Chip
+ rebase on upstream/master
v5
(https://lore.kernel.org/qemu-devel/57ce8d50-db92-44f0-96a9-e1297eea9...@kaod.org/):
+ add chiptod
+ add instance_init for P11 to use P11 models
+ move patch introducing Pnv11Chip to the last
+ update skiboot.lid to skiboot's upstream/master
v4:
+ patch #5: fix memory leak in pnv_chip_power10_quad_realize
- no change in other patches
v3:
+ patch #1: version power11 as power11_v2.0
+ patch #2: split target hw/pseries code into patch #2
+ patch #3,#4: fix regression due to Power10 and Power11 having same PCR
+ patch #5: create pnv_chip_power11_dt_populate and split
pnv_chip_power10_common_realize as per review
+ patch #6-#11: no change
- remove commit to make Power11 as default
v2:
+ split powernv patch into homer,lpc,occ,psi,sbe
+ reduce code duplication by reusing power10 code
+ make power11 as default
+ rebase on qemu upstream/master
+ add more information in commit descriptions
+ update docs
+ update skiboot.lid
Aditya Gupta (8):
ppc/pnv: Introduce Pnv11Chip
ppc/pnv: Introduce Power11 PowerNV machine
ppc/pnv: Add XIVE2 controller to Power11
ppc/pnv: Add PHB5 PCIe Host bridge to Power11
ppc/pnv: Add ChipTOD model for Power11
tests/powernv: Switch to buildroot images instead of op-build
tests/powernv: Add PowerNV test for Power11
MAINTAINERS: Add myself as a reviewer of PowerNV emulation
MAINTAINERS | 1 +
docs/system/ppc/powernv.rst | 9 +-
hw/ppc/pnv.c | 546 +++++++++++++++++++++++++
hw/ppc/pnv_chiptod.c | 59 +++
hw/ppc/pnv_core.c | 17 +
include/hw/ppc/pnv.h | 38 ++
include/hw/ppc/pnv_chip.h | 7 +
include/hw/ppc/pnv_chiptod.h | 2 +
include/hw/ppc/pnv_xscom.h | 49 +++
tests/functional/test_ppc64_powernv.py | 34 +-
10 files changed, 744 insertions(+), 18 deletions(-)
--
2.49.0
