Just cc'ing riscv team Thanks >cmd
On 20/05/2025 9:18 am, CLEMENT MATHIEU--DRIF wrote: > This patch set belongs to a list of series that add SVM support in VT-d. > > Here we focus on introducing a common PCI-level API for ATS and PRI to be > used by virtual devices. > > The API introduced in this series is mainly based on the PCIe Gen 5 spec. > > What is ATS? > '''''''''''' > > ATS (Address Translation Service) is a PCIe-level protocol that > enables PCIe devices to query an IOMMU for virtual to physical > address translations in a specific address space (such as a userspace > process address space). When a device receives translation responses > from an IOMMU, it may decide to store them in an internal cache, > often known as "ATC" (Address Translation Cache) or "Device IOTLB". > To keep page tables and caches consistent, the IOMMU is allowed to > send asynchronous invalidation requests to its client devices. > > What is PRI? > '''''''''''' > > PRI (Page Request Interface) is a PCIe-level protocol that > enables PCIe devices to request page fault resolutions to > the kernel through an IOMMU. PRI combined with ATS are the > 2 cornerstones of a technology called SVM (Shared Virtual > Memory) or SVA (Shared Virtual Addressing) which allows > PCIe devices to read to and write from the memory of > userspace applications without requiring page pinning. > > Here is a link to our GitHub repository that contains: > - Qemu with all the patches for SVM in VT-d > - ATS > - PRI > - Device IOTLB invalidations > - Requests with already pre-translated addresses > - A demo device > - A simple driver for the demo device > - A userspace program (for testing and demonstration purposes) > > https://github.com/BullSequana/Qemu-in-guest-SVM-demo > > Clement Mathieu--Drif (11): > pcie: Add helper to declare PASID capability for a pcie device > pcie: Helper functions to check if PASID is enabled > pcie: Helper function to check if ATS is enabled > pcie: Add a helper to declare the PRI capability for a pcie device > pcie: Helper functions to check to check if PRI is enabled > pci: Cache the bus mastering status in the device > pci: Add an API to get IOMMU's min page size and virtual address width > memory: Store user data pointer in the IOMMU notifiers > pci: Add a pci-level initialization function for IOMMU notifiers > pci: Add a pci-level API for ATS > pci: Add a PCI-level API for PRI > > hw/pci/pci.c | 204 +++++++++++++++++++++-- > hw/pci/pcie.c | 78 +++++++++ > include/hw/pci/pci.h | 315 ++++++++++++++++++++++++++++++++++++ > include/hw/pci/pci_device.h | 1 + > include/hw/pci/pcie.h | 13 +- > include/hw/pci/pcie_regs.h | 8 + > include/system/memory.h | 1 + > 7 files changed, 609 insertions(+), 11 deletions(-) >
