(+Mark for Grackle)
On 3/6/25 15:50, BALATON Zoltan wrote:
On Tue, 3 Jun 2025, Philippe Mathieu-Daudé wrote:
On 4/5/25 18:01, BALATON Zoltan wrote:
Export memory regions as sysbus mmio regions and let the board code
map them.
Why? The mapping belong to the host bridge, not the board...
I took inspiration from grackle that does it the same way.
Well, this is a very old model, looking at commit 426f17bb0b8 in
2009 (then updated in commit a773e64a8fd in 2018).
Today I'd model PCI host bridges as keeping their PCI functions
local (since they can not exist otherwise without the PHB),
instanciated / wired / mapped within the PHB DeviceRealize, like
mv64361_pcihost_realize(), the various ones in hw/pci-host/uninorth.c
or the more complex i440fx_pcihost_realize().
Anyway I can understand your frustration after waiting to get reviewed
for over a month (I am experiencing the same). I was just trying to
help.
Regards,
Phil.
