[PATCH] target/loongarch: add check for fcond

[Song Gao]

fcond only has 22 types, add a check for fcond.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2972

Signed-off-by: Song Gao <gaos...@loongson.cn>
---
 target/loongarch/tcg/insn_trans/trans_fcmp.c.inc | 11 ++++++++---
 target/loongarch/tcg/insn_trans/trans_vec.c.inc  |  4 ++--
 2 files changed, 10 insertions(+), 5 deletions(-)

diff --git a/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc 
b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
index 3babf69e4a..5be759d30c 100644
--- a/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_fcmp.c.inc
@@ -4,10 +4,15 @@
  */
 
 /* bit0(signaling/quiet) bit1(lt) bit2(eq) bit3(un) bit4(neq) */
-static uint32_t get_fcmp_flags(int cond)
+static uint32_t get_fcmp_flags(DisasContext *ctx, int cond)
 {
     uint32_t flags = 0;
 
+    /*check cond , cond =[0-8,10,12] */
+    if ((cond > 8) &&(cond != 10) && (cond != 12)) {
+        generate_exception(ctx, EXCCODE_INE);
+    }
+
     if (cond & 0x1) {
         flags |= FCMP_LT;
     }
@@ -39,7 +44,7 @@ static bool trans_fcmp_cond_s(DisasContext *ctx, 
arg_fcmp_cond_s *a)
     src1 = get_fpr(ctx, a->fj);
     src2 = get_fpr(ctx, a->fk);
     fn = (a->fcond & 1 ? gen_helper_fcmp_s_s : gen_helper_fcmp_c_s);
-    flags = get_fcmp_flags(a->fcond >> 1);
+    flags = get_fcmp_flags(ctx, a->fcond >> 1);
 
     fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
 
@@ -63,7 +68,7 @@ static bool trans_fcmp_cond_d(DisasContext *ctx, 
arg_fcmp_cond_d *a)
     src1 = get_fpr(ctx, a->fj);
     src2 = get_fpr(ctx, a->fk);
     fn = (a->fcond & 1 ? gen_helper_fcmp_s_d : gen_helper_fcmp_c_d);
-    flags = get_fcmp_flags(a->fcond >> 1);
+    flags = get_fcmp_flags(ctx, a->fcond >> 1);
 
     fn(var, tcg_env, src1, src2, tcg_constant_i32(flags));
 
diff --git a/target/loongarch/tcg/insn_trans/trans_vec.c.inc 
b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
index b33622ff79..0128a2398f 100644
--- a/target/loongarch/tcg/insn_trans/trans_vec.c.inc
+++ b/target/loongarch/tcg/insn_trans/trans_vec.c.inc
@@ -4666,7 +4666,7 @@ static bool do_vfcmp_cond_s(DisasContext *ctx, 
arg_vvv_fcond *a, uint32_t sz)
     }
 
     fn = (a->fcond & 1 ? gen_helper_vfcmp_s_s : gen_helper_vfcmp_c_s);
-    flags = get_fcmp_flags(a->fcond >> 1);
+    flags = get_fcmp_flags(ctx, a->fcond >> 1);
     fn(tcg_env, oprsz, vd, vj, vk, tcg_constant_i32(flags));
 
     return true;
@@ -4686,7 +4686,7 @@ static bool do_vfcmp_cond_d(DisasContext *ctx, 
arg_vvv_fcond *a, uint32_t sz)
     }
 
     fn = (a->fcond & 1 ? gen_helper_vfcmp_s_d : gen_helper_vfcmp_c_d);
-    flags = get_fcmp_flags(a->fcond >> 1);
+    flags = get_fcmp_flags(ctx, a->fcond >> 1);
     fn(tcg_env, oprsz, vd, vj, vk, tcg_constant_i32(flags));
 
     return true;
-- 
2.34.1