Re: [PATCH v5 1/2] hw/pci-host/gt64120: Fix endianness handling

[Michael Tokarev]

On 29.04.2025 20:03, Rakesh Jeyasingh wrote:

The GT-64120 PCI controller requires special handling where:
1. Host bridge(bus 0 ,device 0) must never be byte-swapped
2. Other devices follow MByteSwap bit in GT_PCI0_CMD

The previous implementation incorrectly  swapped all accesses, breaking
host bridge detection (lspci -d 11ab:4620).

Changes made:
1. Removed gt64120_update_pci_cfgdata_mapping() and moved data_mem 
initialization
   to gt64120_realize() for cleaner setup
2. Implemented custom read/write handlers that:
    - Preserve host bridge accesses (extract32(config_reg,11,13)==0)
    - apply swapping only for non-bridge devices in big-endian mode

Fixes: 145e2198 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE 
MemoryRegionOps")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2826
Signed-off-by: Rakesh Jeyasingh <rakeshjb...@gmail.com>

This seems to be qemu-stable material.

I picked this one up for 9.2 and 10.0,
please let me know if I shouldn't.

Thanks,

/mjt