On 5/4/25 9:17 AM, Richard Henderson wrote:
On 5/3/25 22:28, Pierrick Bouvier wrote:
+++ b/target/arm/tcg/translate-a64.c
@@ -258,7 +258,7 @@ static void gen_address_with_allocation_tag0(TCGv_i64 dst,
TCGv_i64 src)
static void gen_probe_access(DisasContext *s, TCGv_i64 ptr,
MMUAccessType acc, int log2_size)
{
- gen_helper_probe_access(tcg_env, ptr,
+ gen_helper_probe_access(tcg_env, (TCGv_vaddr) ptr,
tcg_constant_i32(acc),
tcg_constant_i32(get_mem_index(s)),
tcg_constant_i32(1 << log2_size));
This cast is incorrect.
I'll change to i32/i64 typedef, but I wonder if it's ok in tcg code to
do this kind of cast, when you know the dh_typecode will match behind
the hoods?
In this case, I thought it was ok since this compilation units is only
compiled for 64 bits hosts, thus ensuring TCGv_vaddr has the same
storage size and dh_typecode behind the hoods.
You need something akin to tcg_gen_trunc_i64_ptr.
Alternately, do not create TCGv_vaddr as a distinct type,
but simply a #define for either TCGv_{i32,i64}.
Ok.
In this case, it'll be TCGv_i64 and everything will match.
r~
