Signed-off-by: Joel Stanley <j...@jms.id.au>
---
hw/riscv/virt.c | 42 +++++++++++++++++++++---------------------
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index cd19c266e62a..1162b3a4b71a 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -80,27 +80,27 @@ static bool virt_aclint_allowed(void)
}
static const MemMapEntry virt_memmap[] = {
- [VIRT_DEBUG] = { 0x0, 0x100 },
- [VIRT_MROM] = { 0x1000, 0xf000 },
- [VIRT_TEST] = { 0x100000, 0x1000 },
- [VIRT_RTC] = { 0x101000, 0x1000 },
- [VIRT_CLINT] = { 0x2000000, 0x10000 },
- [VIRT_ACLINT_SSWI] = { 0x2F00000, 0x4000 },
- [VIRT_PCIE_PIO] = { 0x3000000, 0x10000 },
- [VIRT_IOMMU_SYS] = { 0x3010000, 0x1000 },
- [VIRT_PLATFORM_BUS] = { 0x4000000, 0x2000000 },
- [VIRT_PLIC] = { 0xc000000, VIRT_PLIC_SIZE(VIRT_CPUS_MAX * 2) },
- [VIRT_APLIC_M] = { 0xc000000, APLIC_SIZE(VIRT_CPUS_MAX) },
- [VIRT_APLIC_S] = { 0xd000000, APLIC_SIZE(VIRT_CPUS_MAX) },
- [VIRT_UART0] = { 0x10000000, 0x100 },
- [VIRT_VIRTIO] = { 0x10001000, 0x1000 },
- [VIRT_FW_CFG] = { 0x10100000, 0x18 },
- [VIRT_FLASH] = { 0x20000000, 0x4000000 },
- [VIRT_IMSIC_M] = { 0x24000000, VIRT_IMSIC_MAX_SIZE },
- [VIRT_IMSIC_S] = { 0x28000000, VIRT_IMSIC_MAX_SIZE },
- [VIRT_PCIE_ECAM] = { 0x30000000, 0x10000000 },
- [VIRT_PCIE_MMIO] = { 0x40000000, 0x40000000 },
- [VIRT_DRAM] = { 0x80000000, 0x0 },
+ [VIRT_DEBUG] = { 0x0 | BIT(36), 0x100 },
+ [VIRT_MROM] = { 0x1000 | BIT(36), 0xf000 },
+ [VIRT_TEST] = { 0x100000 | BIT(36), 0x1000 },
+ [VIRT_RTC] = { 0x101000 | BIT(36), 0x1000 },
+ [VIRT_CLINT] = { 0x2000000 | BIT(36), 0x10000 },
+ [VIRT_ACLINT_SSWI] = { 0x2F00000 | BIT(36), 0x4000 },
+ [VIRT_PCIE_PIO] = { 0x3000000 | BIT(36), 0x10000 },
+ [VIRT_IOMMU_SYS] = { 0x3010000 | BIT(36), 0x1000 },
+ [VIRT_PLATFORM_BUS] = { 0x4000000 | BIT(36), 0x2000000 },
+ [VIRT_PLIC] = { 0xc000000 | BIT(36), VIRT_PLIC_SIZE(VIRT_CPUS_MAX
* 2) },
+ [VIRT_APLIC_M] = { 0xc000000 | BIT(36), APLIC_SIZE(VIRT_CPUS_MAX) },
+ [VIRT_APLIC_S] = { 0xd000000 | BIT(36), APLIC_SIZE(VIRT_CPUS_MAX) },
+ [VIRT_UART0] = { 0x10000000 | BIT(36), 0x100 },
+ [VIRT_VIRTIO] = { 0x10001000 | BIT(36), 0x1000 },
+ [VIRT_FW_CFG] = { 0x10100000 | BIT(36), 0x18 },
+ [VIRT_FLASH] = { 0x20000000 | BIT(36), 0x4000000 },
+ [VIRT_IMSIC_M] = { 0x24000000 | BIT(36), VIRT_IMSIC_MAX_SIZE },
+ [VIRT_IMSIC_S] = { 0x28000000 | BIT(36), VIRT_IMSIC_MAX_SIZE },
+ [VIRT_PCIE_ECAM] = { 0x30000000 | BIT(36), 0x10000000 },
+ [VIRT_PCIE_MMIO] = { 0x40000000 | BIT(36), 0x40000000 },
+ [VIRT_DRAM] = { 0x80000000 | BIT(36), 0x0 },
};
/* PCIe high mmio is fixed for RV32 */
--
2.47.2
