On Sat, Apr 26, 2025 at 1:24 AM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/csr.c | 9 +++++----
> 1 file changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index e9c2f95b6e..d62d1aaaee 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -5588,7 +5588,7 @@ RISCVException riscv_csrrw(CPURISCVState *env, int
> csrno,
> static RISCVException riscv_csrrw_do128(CPURISCVState *env, int csrno,
> Int128 *ret_value,
> Int128 new_value,
> - Int128 write_mask)
> + Int128 write_mask, uintptr_t ra)
> {
> RISCVException ret;
> Int128 old_value;
> @@ -5610,7 +5610,7 @@ static RISCVException riscv_csrrw_do128(CPURISCVState
> *env, int csrno,
> }
> } else if (csr_ops[csrno].write) {
> /* avoids having to write wrappers for all registers */
> - ret = csr_ops[csrno].write(env, csrno, int128_getlo(new_value),
> 0);
> + ret = csr_ops[csrno].write(env, csrno, int128_getlo(new_value),
> ra);
> if (ret != RISCV_EXCP_NONE) {
> return ret;
> }
> @@ -5637,7 +5637,7 @@ RISCVException riscv_csrr_i128(CPURISCVState *env, int
> csrno,
>
> if (csr_ops[csrno].read128) {
> return riscv_csrrw_do128(env, csrno, ret_value,
> - int128_zero(), int128_zero());
> + int128_zero(), int128_zero(), 0);
> }
>
> /*
> @@ -5667,7 +5667,8 @@ RISCVException riscv_csrrw_i128(CPURISCVState *env, int
> csrno,
> }
>
> if (csr_ops[csrno].read128) {
> - return riscv_csrrw_do128(env, csrno, ret_value, new_value,
> write_mask);
> + return riscv_csrrw_do128(env, csrno, ret_value,
> + new_value, write_mask, 0);
> }
>
> /*
> --
> 2.43.0
>
>
