> I had an idea of mapping the full 32-bit target virtual address space > to a 4GB area on 64-bit hosts. Then the loads and stores to normal RAM > (except page tables, code_mem_write etc) could be made much faster, > falling back to softmmu for other pages. The idea has come up before, > for example in this Fabrice's message: > http://article.gmane.org/gmane.comp.emulators.qemu/685 > > But I'm not sure if this would be worth the effort, the speedup would > depend on the frequency of the loads/stores and also translation time > vs. translated code execution times. Does anyone have good statistics > on those?
I'd expect the overhead of SIGSEGV+mmap to be prohibitive. I don't have numbers to back this up, but experience with MIPS system emulation shows that TLB miss cost can have significant effect on overall performance. Like Fabrice, I think this would be most useful in combination with some sort of hypervisor. Somewhere on my TODO list is porting qemu to run directly as a paravirtual Xen DomU. This means you can insert the guest pagetable walk directly into the host mmu fault handler, and do clever things with shadow pagetables. I should probably get the cycle counting patches polished and applied. These include a mechanism for distinguishing RAM and MMIO accesses. Paul
