> > + /* > > + * cache info (L1 cache) > > + * > > + * For !vendor_cpuid_only case, non-AMD CPU would get the wrong > > + * information, i.e., get AMD's cache model. It doesn't matter, > > + * vendor_cpuid_only has been turned on by default since > > + * PC machine v6.1. > > + */ > > We need to define a new compat property for it other than vendor_cpuid_only, > for 10.1. > > I proposed some change to leaf FEAT_8000_0001_EDX[1], and I was told by > Paolo (privately) that vendor_cpuid_only doesn't suffice. > > On Fri, Oct 11, 2024 at 6:22 PM Xiaoyao Li <xiaoyao...@intel.com> wrote: > > > > On 10/11/2024 11:30 PM, Paolo Bonzini wrote: > > > On Fri, Oct 11, 2024 at 4:55 PM Xiaoyao Li <xiaoyao...@intel.com> > wrote: > > >> > > >> I think patch 8 is also a general issue> Without it, the > > >> CPUID_EXT2_AMD_ALIASES bits are exposed to Intel VMs which are > > >> reserved bits for Intel. > > > > > > Yes but you'd have to add compat properties for these. If you can do > > > it for TDX only, that's easier. > > > > Does vendor_cpuid_only suffice? > > Unfortunately not, because it is turned off only for <=6.0 machine > types. Here you'd have to turn it off for <=9.1 machine types. > > > [1] > https://lore.kernel.org/qemu-devel/20240814075431.339209-9-xiaoyao...@intel.com/
For the patch link, you wanted to mark it as unavailiable but it would break the machine <= 6.0 (with vendor_cpuid_only turned off), correct? For this patch: * vendor_cpuid_only turns off for <= 6.0 machine, no change. * vendor_cpuid_only turns on for > 6.0 machine, I treated it as a "direct" fix because original codes encode the AMD cache model info on non-AMD platform (in ecx & edx). This doesn't make sense. Non-AMD platform should use cache_info_cpuid4 or 0 here. If it is considered a fix, it may be more appropriate to use cache_info_cpuid4. I think it's somehow similar to the “trade-offs” Daniel indicated [2]. This case can also be fixed by compat option. Then we don't need to encode cache_info_cpuid4 info for non-AMD platforms in this leaf. Do you still need the patches in your links? (I didn't find the related patch merged.) If so, I can add the compat option in the next version which could also help you land your previous patches v10.1 as well. [2]: https://lore.kernel.org/qemu-devel/z08j2ii-quzk3...@redhat.com/ > > + if (cpu->vendor_cpuid_only && > > + (IS_INTEL_CPU(env) || IS_ZHAOXIN_CPU(env))) { > > + *eax = *ebx = *ecx = *edx = 0; > > + break; > > + } else if (cpu->cache_info_passthrough) { > > x86_cpu_get_cache_cpuid(index, 0, eax, ebx, ecx, edx); > > break; > > } > > + > > *eax = (L1_DTLB_2M_ASSOC << 24) | (L1_DTLB_2M_ENTRIES << 16) | > > (L1_ITLB_2M_ASSOC << 8) | (L1_ITLB_2M_ENTRIES); > > *ebx = (L1_DTLB_4K_ASSOC << 24) | (L1_DTLB_4K_ENTRIES << 16) | >
