On 4/10/25 8:22 PM, Paolo Bonzini wrote:
On 4/7/25 04:07, Ewan Hai wrote:
The model number was mistakenly set to 0x0b (11) in commit ff04bc1ac4.
The correct value is 0x5b. This mistake occurred because the extended
model bits in cpuid[eax=0x1].eax were overlooked, and only the base
model was used.
This patch corrects the model field.
Hi, please follow commit e0013791b9326945ccd09b5b602437beb322cab8 to
define a new version of the CPU.
I’ve noticed that in the QEMU repository at commit
e0013791b9326945ccd09b5b602437beb322cab8 (as HEAD), the following patches I
previously submitted (which the Zhaoxin YongFeng vCPU model depends on) are not
included:
- 5d20aa540b6991c0dbeef933d2055e5372f52e0e: "target/i386: Add support for
Zhaoxin CPU vendor identification"
- c0799e8b003713e07b546faba600363eccd179ee: "target/i386: Add CPUID leaf
0xC000_0001 EDX definitions"
- ff04bc1ac478656e5d6a255bf4069edb3f55bc58: "target/i386: Introduce Zhaoxin
Yongfeng CPU model" (this is the main patch that needs to be fixed)
- a4e749780bd20593c0c386612a51bf4d64a80132: "target/i386: Mask CMPLegacy bit in
CPUID[0x80000001].ECX for Zhaoxin CPUs"
Should I resend the entire patchset, or would it be sufficient to just send a
revised version of the “target/i386: Introduce Zhaoxin Yongfeng CPU model” patch?
Thank you for your guidance.
