The SoC has three SPI controllers, not four. Remove the extra define of an SPI
IRQ.
Fixes: 06908a84f036 "hw/arm/fsl-imx8mp: Add SPI controllers"
Signed-off-by: Bernhard Beschow <shen...@gmail.com>
---
include/hw/arm/fsl-imx8mp.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/include/hw/arm/fsl-imx8mp.h b/include/hw/arm/fsl-imx8mp.h
index 22fdc0d67c..d016f7d337 100644
--- a/include/hw/arm/fsl-imx8mp.h
+++ b/include/hw/arm/fsl-imx8mp.h
@@ -238,7 +238,6 @@ enum FslImx8mpIrqs {
FSL_IMX8MP_ECSPI1_IRQ = 31,
FSL_IMX8MP_ECSPI2_IRQ = 32,
FSL_IMX8MP_ECSPI3_IRQ = 33,
- FSL_IMX8MP_ECSPI4_IRQ = 34,
FSL_IMX8MP_I2C1_IRQ = 35,
FSL_IMX8MP_I2C2_IRQ = 36,
--
2.48.1
