On Mon, 10 Mar 2025 16:02:45 +0800 Junjie Fu <fujunj...@qq.com> wrote:
> > Note though that there is a long way to go before we can do what you > > want. The steps I'd expect to see along the way: > > > > 1) Emulate an Multi Headed Device. > > Initially connect two heads to different host bridges on a single QEMU > > machine. That lets us test most of the code flows without needing > > to handle tests that involve multiple machines. > > Later, we could add a means to connect between two instances of QEMU. > > 2) Add DCD support (we'll need the kernel side of that as well) > > 3) Wire it all up. > > 4) Do the same for a Switch with MLDs behind it so we can poke the fun > > corners. > > > Hi,Jonathan > > Given your previous exploration, I would like to ask the following questions: > 1.Does QEMU currently support simulating the above CXL memory pooling > scenario? Not in upstream yet but Gregory posted emulation support last year. https://lore.kernel.org/qemu-devel/20241018161252.8896-1-gou...@gourry.net/ I'm carrying the patches on my staging tree. https://gitlab.com/jic23/qemu/-/commits/cxl-2025-02-20?ref_type=heads Longer term I remain a little unconvinced by whether this is the best approach because I also want a single management path (so fake CCI etc) and that may need to be exposed to one of the hosts for tests purposes. In the current approach commands are issued to each host directly to surface memory. > > 2.If not fully supported yet, are there any available development branches > or patches that implement this functionality? > > 3.Are there any guidelines or considerations for configuring and testing CXL > memory pooling in QEMU? There is some information in that patch series cover letter. +CC Gregory and Svelty. > > I sincerely appreciate your time and guidance on this topic! > No problem. Jonathan
