[PATCH] target/i386: Fix #GP error code for INT instructions

[Andrew Cooper]

While the (intno << shift) expression is correct for indexing the IDT based on
whether Long Mode is active, the error code itself was unchanged with AMD64,
and is still the index with 3 bits of metadata in the bottom.

Found when running a Xen unit test, all under QEMU.  The unit test objected to
being told there was an error with IDT index 256 when INT $0x80 (128) was the
problem instruction:

  ...
  Error: Unexpected fault 0x800d0802, #GP[IDT[256]]
  ...

Fixes: d2fd1af76777 ("x86_64 linux user emulation")
Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
---
CC: Paolo Bonzini <pbonz...@redhat.com>
CC: Richard Henderson <richard.hender...@linaro.org>
CC: Eduardo Habkost <edua...@habkost.net>
---
 target/i386/tcg/user/seg_helper.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/target/i386/tcg/user/seg_helper.c 
b/target/i386/tcg/user/seg_helper.c
index c45f2ac2ba68..ff328b2a9522 100644
--- a/target/i386/tcg/user/seg_helper.c
+++ b/target/i386/tcg/user/seg_helper.c
@@ -64,7 +64,7 @@ static void do_interrupt_user(CPUX86State *env, int intno, 
int is_int,
         cpl = env->hflags & HF_CPL_MASK;
         /* check privilege if software int */
         if (dpl < cpl) {
-            raise_exception_err(env, EXCP0D_GPF, (intno << shift) + 2);
+            raise_exception_err(env, EXCP0D_GPF, intno * 8 + 2);
         }
     }
 

base-commit: 825b96dbcee23d134b691fc75618b59c5f53da32
-- 
2.39.5