From: dan tan <dan...@linux.ibm.com> Register RWMR - Region Weighted Mode Register for privileged access in Power9 and Power10
It controls what the SPURR register produces. Specs: - Power10: https://files.openpower.foundation/s/EgCy7C43p2NSRfR TCG does not model SMT priority, timing, resource controls and status so this register has no effect for now. [npiggin: adjust changelog] Signed-off-by: dan tan <dan...@linux.ibm.com> Message-ID: <20250116154226.13376-1-dan...@linux.vnet.ibm.com> Signed-off-by: Nicholas Piggin <npig...@gmail.com> --- target/ppc/cpu.h | 1 + target/ppc/cpu_init.c | 5 +++++ 2 files changed, 6 insertions(+) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 682583d1d1..25b1e6d6b0 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -2102,6 +2102,7 @@ void ppc_compat_add_property(Object *obj, const char *name, #define SPR_PMCR (0x374) #define SPR_440_ITV0 (0x374) #define SPR_440_ITV1 (0x375) +#define SPR_RWMR (0x375) #define SPR_440_ITV2 (0x376) #define SPR_440_ITV3 (0x377) #define SPR_440_CCR1 (0x378) diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 54035c7bbb..8d73e11540 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -5773,6 +5773,11 @@ static void register_power9_book4_sprs(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_WORT, 0); + spr_register_hv(env, SPR_RWMR, "RWMR", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + &spr_read_generic, &spr_write_generic, + 0x00000000); #endif } -- 2.47.1
