On Sun, Mar 02, 2025 at 02:00:09PM -0800, Dongli Zhang wrote:
> Date: Sun, 2 Mar 2025 14:00:09 -0800
> From: Dongli Zhang <dongli.zh...@oracle.com>
> Subject: [PATCH v2 01/10] target/i386: disable PerfMonV2 when PERFCORE
> unavailable
> X-Mailer: git-send-email 2.43.5
>
> When the PERFCORE is disabled with "-cpu host,-perfctr-core", it is
> reflected in in guest dmesg.
>
> [ 0.285136] Performance Events: AMD PMU driver.
>
> However, the guest CPUID indicates the PerfMonV2 is still available.
>
> CPU:
> Extended Performance Monitoring and Debugging (0x80000022):
> AMD performance monitoring V2 = true
> AMD LBR V2 = false
> AMD LBR stack & PMC freezing = false
> number of core perf ctrs = 0x6 (6)
> number of LBR stack entries = 0x0 (0)
> number of avail Northbridge perf ctrs = 0x0 (0)
> number of available UMC PMCs = 0x0 (0)
> active UMCs bitmask = 0x0
>
> Disable PerfMonV2 in CPUID when PERFCORE is disabled.
>
> Suggested-by: Zhao Liu <zhao1....@intel.com>
> Fixes: 209b0ac12074 ("target/i386: Add PerfMonV2 feature bit")
> Signed-off-by: Dongli Zhang <dongli.zh...@oracle.com>
> ---
> Changed since v1:
> - Use feature_dependencies (suggested by Zhao Liu).
>
> target/i386/cpu.c | 4 ++++
> 1 file changed, 4 insertions(+)
Thanks!
Reviewed-by: Zhao Liu <zhao1....@intel.com>
