On Sun, Mar 2, 2025 at 11:07 PM hemanshu.khilari.foss <hemanshu.khilari.f...@gmail.com> wrote: > > The link to riscv iommu specification document is incorrect. This patch > updates the said link to point to correct location. > > Cc: qemu-ri...@nongnu.org > Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2808 > Signed-off-by: hemanshu.khilari.foss <hemanshu.khilari.f...@gmail.com>
Thanks! Applied to riscv-to-apply.next Alistair > --- > docs/specs/riscv-iommu.rst | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/docs/specs/riscv-iommu.rst b/docs/specs/riscv-iommu.rst > index b1538c9ead..772145e8d7 100644 > --- a/docs/specs/riscv-iommu.rst > +++ b/docs/specs/riscv-iommu.rst > @@ -4,7 +4,7 @@ RISC-V IOMMU support for RISC-V machines > ======================================== > > QEMU implements a RISC-V IOMMU emulation based on the RISC-V IOMMU spec > -version 1.0 `iommu1.0`_. > +version 1.0 `iommu1.0.0`_. > > The emulation includes a PCI reference device (riscv-iommu-pci) and a > platform > bus device (riscv-iommu-sys) that QEMU RISC-V boards can use. The 'virt' > @@ -107,7 +107,7 @@ riscv-iommu options: > - "s-stage": enabled > - "g-stage": enabled > > -.. _iommu1.0: > https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0/riscv-iommu.pdf > +.. _iommu1.0.0: > https://github.com/riscv-non-isa/riscv-iommu/releases/download/v1.0.0/riscv-iommu.pdf > > .. _linux-v8: > https://lore.kernel.org/linux-riscv/cover.1718388908.git.tjezn...@rivosinc.com/ > > -- > 2.42.0 > >
