On Thu, Dec 5, 2024 at 11:32 PM Daniel Henrique Barboza
<dbarb...@ventanamicro.com> wrote:
>
> This header is incomplete, i.e. it is using definitions that are being
> supplied by the .c files that are including it.
>
> Adding this header into a fresh .c file will result in errors:
>
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:30:17: error: field 
> ‘parent_obj’ has incomplete type
>    30 |     DeviceState parent_obj;
>       |                 ^~~~~~~~~~
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:50:5: error: unknown type 
> name ‘dma_addr_t’; did you mean ‘in_addr_t’?
>    50 |     dma_addr_t cq_addr;   /* Command queue base physical address */
>       |     ^~~~~~~~~~
>       |     in_addr_t
> (...)
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:62:5: error: unknown type 
> name ‘QemuThread’; did you mean ‘GThread’?
>    62 |     QemuThread core_proc; /* Background processing thread */
>       |     ^~~~~~~~~~
>       |     GThread
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:63:5: error: unknown type 
> name ‘QemuCond’
>    63 |     QemuCond core_cond;   /* Background processing wake up signal */
>       |     ^~~~~~~~
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:71:18: error: field ‘trap_as’ 
> has incomplete type
>    71 |     AddressSpace trap_as;
>       |                  ^~~~~~~
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:72:18: error: field ‘trap_mr’ 
> has incomplete type
>    72 |     MemoryRegion trap_mr;
>       |                  ^~~~~~~
> /home/danielhb/work/qemu/hw/riscv/riscv-iommu.h:80:18: error: field ‘regs_mr’ 
> has incomplete type
>    80 |     MemoryRegion regs_mr;
>       |                  ^~~~~~~
>
> Fix it by adding the missing headers for these definitions.
>
> Signed-off-by: Daniel Henrique Barboza <dbarb...@ventanamicro.com>

Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>

Alistair

> ---
>  hw/riscv/riscv-iommu.h | 2 ++
>  1 file changed, 2 insertions(+)
>
> diff --git a/hw/riscv/riscv-iommu.h b/hw/riscv/riscv-iommu.h
> index 9424989df4..2de0cdfc56 100644
> --- a/hw/riscv/riscv-iommu.h
> +++ b/hw/riscv/riscv-iommu.h
> @@ -20,6 +20,8 @@
>  #define HW_RISCV_IOMMU_STATE_H
>
>  #include "qom/object.h"
> +#include "hw/qdev-properties.h"
> +#include "sysemu/dma.h"
>  #include "hw/riscv/iommu.h"
>  #include "hw/riscv/riscv-iommu-bits.h"
>
> --
> 2.47.1
>
>

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