On Sun, Feb 16, 2025 at 12:49 PM Richard Henderson <richard.hender...@linaro.org> wrote: > > These defines never should have been added as they were > never used. Only 32-bit hosts may have these opcodes and > they have them unconditionally. > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Acked-by: Alistair Francis <alistair.fran...@wdc.com> Alistair > --- > tcg/loongarch64/tcg-target-has.h | 2 -- > tcg/riscv/tcg-target-has.h | 2 -- > 2 files changed, 4 deletions(-) > > diff --git a/tcg/loongarch64/tcg-target-has.h > b/tcg/loongarch64/tcg-target-has.h > index ac88522eef..188b00799f 100644 > --- a/tcg/loongarch64/tcg-target-has.h > +++ b/tcg/loongarch64/tcg-target-has.h > @@ -37,8 +37,6 @@ > #define TCG_TARGET_HAS_clz_i32 1 > #define TCG_TARGET_HAS_ctz_i32 1 > #define TCG_TARGET_HAS_ctpop_i32 0 > -#define TCG_TARGET_HAS_brcond2 0 > -#define TCG_TARGET_HAS_setcond2 0 > #define TCG_TARGET_HAS_qemu_st8_i32 0 > > /* 64-bit operations */ > diff --git a/tcg/riscv/tcg-target-has.h b/tcg/riscv/tcg-target-has.h > index f35f9b31f5..98081084f2 100644 > --- a/tcg/riscv/tcg-target-has.h > +++ b/tcg/riscv/tcg-target-has.h > @@ -37,8 +37,6 @@ > #define TCG_TARGET_HAS_clz_i32 (cpuinfo & CPUINFO_ZBB) > #define TCG_TARGET_HAS_ctz_i32 (cpuinfo & CPUINFO_ZBB) > #define TCG_TARGET_HAS_ctpop_i32 (cpuinfo & CPUINFO_ZBB) > -#define TCG_TARGET_HAS_brcond2 1 > -#define TCG_TARGET_HAS_setcond2 1 > #define TCG_TARGET_HAS_qemu_st8_i32 0 > > #define TCG_TARGET_HAS_negsetcond_i64 1 > -- > 2.43.0 > >
