The pxa2xx CPUs are now only useful with user-mode emulation, because
we dropped all the machine types that used them in 9.2. (Technically
you could alse use "-cpu pxa270" with a board model like versatilepb
which doesn't sanity-check the CPU type, but that has never been a
supported config.)
To use them (or iwMMXt emulation) with QEMU user-mode you would need
to explicitly select them with the -cpu option or the QEMU_CPU
environment variable. A google search finds no examples of anybody
doing this in the last decade; I don't believe the GCC folks are
using QEMU to test their iwMMXt codegen either. In fact, GCC is in
the process of dropping support for iwMMXT entirely.
The iwMMXt emulation is thousands of lines of code in QEMU, and
is now the only bit of Arm insn decode which doesn't use decodetree.
We have no way to test or validate changes to it. This code is
just dead weight that is almost certainly not being used by anybody.
Mark it as deprecated.
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
docs/about/deprecated.rst | 21 +++++++++++++++++++++
target/arm/cpu.h | 1 +
target/arm/cpu.c | 3 +++
target/arm/tcg/cpu32.c | 36 ++++++++++++++++++++++++------------
4 files changed, 49 insertions(+), 12 deletions(-)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index 4a3c302962a..29de49351d1 100644
--- a/docs/about/deprecated.rst
+++ b/docs/about/deprecated.rst
@@ -204,6 +204,27 @@ is going to be so much slower it wouldn't make sense for
any serious
instrumentation. Due to implementation differences there will also be
anomalies in things like memory instrumentation.
+linux-user mode CPUs
+--------------------
+
+iwMMXt emulation and the ``pxa`` CPUs (since 10.0)
+''''''''''''''''''''''''''''''''''''''''''''''''''
+
+The ``pxa`` CPU family (``pxa250``, ``pxa255``, ``pxa260``,
+``pxa261``, ``pxa262``, ``pxa270-a0``, ``pxa270-a1``, ``pxa270``,
+``pxa270-b0``, ``pxa270-b1``, ``pxa270-c0``, ``pxa270-c5``) are no
+longer used in system emulation, because all the machine types which
+used these CPUs were removed in the QEMU 9.2 release. These CPUs can
+now only be used in linux-user mode, and to do that you would have to
+explicitly select one of these CPUs with the ``-cpu`` command line
+option or the ``QEMU_CPU`` environment variable.
+
+We don't believe that anybody is using the iwMMXt emulation, and we do
+not have any tests to validate it or any real hardware or similar
+known-good implementation to test against. GCC is in the process of
+dropping their support for iwMMXt codegen. These CPU types are
+therefore deprecated in QEMU, and will be removed in a future release.
+
System emulator CPUs
--------------------
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9a6e8e589cc..71df9d3a0c4 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1114,6 +1114,7 @@ struct ArchCPU {
typedef struct ARMCPUInfo {
const char *name;
+ const char *deprecation_note;
void (*initfn)(Object *obj);
void (*class_init)(ObjectClass *oc, void *data);
} ARMCPUInfo;
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index dc0231233a6..8a0e3d12f3f 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2756,6 +2756,9 @@ static void cpu_register_class_init(ObjectClass *oc, void
*data)
acc->info = data;
cc->gdb_core_xml_file = "arm-core.xml";
+ if (acc->info->deprecation_note) {
+ cc->deprecation_note = acc->info->deprecation_note;
+ }
}
void arm_cpu_register(const ARMCPUInfo *info)
diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c
index 2ad21825255..0f1c5bc87e8 100644
--- a/target/arm/tcg/cpu32.c
+++ b/target/arm/tcg/cpu32.c
@@ -1026,19 +1026,31 @@ static const ARMCPUInfo arm_tcg_cpus[] = {
{ .name = "ti925t", .initfn = ti925t_initfn },
{ .name = "sa1100", .initfn = sa1100_initfn },
{ .name = "sa1110", .initfn = sa1110_initfn },
- { .name = "pxa250", .initfn = pxa250_initfn },
- { .name = "pxa255", .initfn = pxa255_initfn },
- { .name = "pxa260", .initfn = pxa260_initfn },
- { .name = "pxa261", .initfn = pxa261_initfn },
- { .name = "pxa262", .initfn = pxa262_initfn },
+ { .name = "pxa250", .initfn = pxa250_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa255", .initfn = pxa255_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa260", .initfn = pxa260_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa261", .initfn = pxa261_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa262", .initfn = pxa262_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
/* "pxa270" is an alias for "pxa270-a0" */
- { .name = "pxa270", .initfn = pxa270a0_initfn },
- { .name = "pxa270-a0", .initfn = pxa270a0_initfn },
- { .name = "pxa270-a1", .initfn = pxa270a1_initfn },
- { .name = "pxa270-b0", .initfn = pxa270b0_initfn },
- { .name = "pxa270-b1", .initfn = pxa270b1_initfn },
- { .name = "pxa270-c0", .initfn = pxa270c0_initfn },
- { .name = "pxa270-c5", .initfn = pxa270c5_initfn },
+ { .name = "pxa270", .initfn = pxa270a0_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-a0", .initfn = pxa270a0_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-a1", .initfn = pxa270a1_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-b0", .initfn = pxa270b0_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-b1", .initfn = pxa270b1_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-c0", .initfn = pxa270c0_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
+ { .name = "pxa270-c5", .initfn = pxa270c5_initfn,
+ .deprecation_note = "iwMMXt CPUs are no longer supported", },
#ifndef TARGET_AARCH64
{ .name = "max", .initfn = arm_max_initfn },
#endif
--
2.34.1
