From: Yanfeng Liu <p-liuyanfe...@xiaomi.com> This enables generic timer feature for Cortex-R5 so that to support guests like NuttX RTOS.
Signed-off-by: Yanfeng Liu <yfliu2...@qq.com> --- target/arm/tcg/cpu32.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/tcg/cpu32.c b/target/arm/tcg/cpu32.c index 2ad2182525..5d68d515b4 100644 --- a/target/arm/tcg/cpu32.c +++ b/target/arm/tcg/cpu32.c @@ -590,9 +590,10 @@ static void cortex_r5_initfn(Object *obj) set_feature(&cpu->env, ARM_FEATURE_V7MP); set_feature(&cpu->env, ARM_FEATURE_PMSA); set_feature(&cpu->env, ARM_FEATURE_PMU); + set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER); cpu->midr = 0x411fc153; /* r1p3 */ cpu->isar.id_pfr0 = 0x0131; - cpu->isar.id_pfr1 = 0x001; + cpu->isar.id_pfr1 = 0x10001; cpu->isar.id_dfr0 = 0x010400; cpu->id_afr0 = 0x0; cpu->isar.id_mmfr0 = 0x0210030; -- 2.34.1