[PATCH 08/23] hw/mips/bootloader: Propagate CPU env to bl_gen_sw()

[Philippe Mathieu-Daudé]

Propagate the target specific CPU env to the locally
declared bl_gen_sw() function.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
 hw/mips/bootloader.c | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/hw/mips/bootloader.c b/hw/mips/bootloader.c
index 9f35b23653a..30e6422d331 100644
--- a/hw/mips/bootloader.c
+++ b/hw/mips/bootloader.c
@@ -195,9 +195,10 @@ static void bl_gen_sw_nm(void **ptr, bl_reg rt, uint8_t 
rs, uint16_t ofs12)
     st_nm32_p(ptr, insn);
 }
 
-static void bl_gen_sw(void **p, bl_reg rt, uint8_t base, uint16_t offset)
+static void bl_gen_sw(const CPUMIPSState *env, void **p,
+                      bl_reg rt, uint8_t base, uint16_t offset)
 {
-    if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_NANOMIPS32)) {
+    if (bootcpu_supports_isa(env, ISA_NANOMIPS32)) {
         bl_gen_sw_nm(p, rt, base, offset);
     } else {
         bl_gen_i_type(p, 0x2b, base, rt, offset);
@@ -285,7 +286,7 @@ void bl_gen_write_ulong(void **p, target_ulong addr, 
target_ulong val)
     if (bootcpu_supports_isa(&MIPS_CPU(first_cpu)->env, ISA_MIPS3)) {
         bl_gen_sd(p, BL_REG_K0, BL_REG_K1, 0x0);
     } else {
-        bl_gen_sw(p, BL_REG_K0, BL_REG_K1, 0x0);
+        bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0);
     }
 }
 
@@ -293,7 +294,7 @@ void bl_gen_write_u32(void **p, target_ulong addr, uint32_t 
val)
 {
     bl_gen_li(p, BL_REG_K0, val);
     bl_gen_load_ulong(p, BL_REG_K1, addr);
-    bl_gen_sw(p, BL_REG_K0, BL_REG_K1, 0x0);
+    bl_gen_sw(&MIPS_CPU(first_cpu)->env, p, BL_REG_K0, BL_REG_K1, 0x0);
 }
 
 void bl_gen_write_u64(void **p, target_ulong addr, uint64_t val)
-- 
2.47.1