On Fri, Dec 13, 2024 at 05:26:45PM +0000, Hendrik Wuethrich wrote:
> From: Hendrik Wüthrich <whend...@google.com>
>
> Make sure that RDT monitoring and allocation features are included in
> in full_cpuid_auto_level.
>
> Signed-off-by: Hendrik Wüthrich <whend...@google.com>
> ---
> target/i386/cpu.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index f7904870ed..4f1493043e 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -880,6 +880,7 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1,
> #else
> #define TCG_7_0_ECX_RDPID 0
> #endif
> +
> #define TCG_7_0_ECX_FEATURES (CPUID_7_0_ECX_UMIP | CPUID_7_0_ECX_PKU | \
> /* CPUID_7_0_ECX_OSPKE is dynamic */ \
> CPUID_7_0_ECX_LA57 | CPUID_7_0_ECX_PKS | CPUID_7_0_ECX_VAES | \
do not change unrelated code pls.
> @@ -7672,6 +7673,8 @@ void x86_cpu_expand_features(X86CPU *cpu, Error **errp)
> x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX);
> x86_cpu_adjust_feat_level(cpu, FEAT_SVM);
> x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE);
> + x86_cpu_adjust_feat_level(cpu, FEAT_RDT_F_0_EDX);
> + x86_cpu_adjust_feat_level(cpu, FEAT_RDT_10_0_EBX);
>
> /* Intel Processor Trace requires CPUID[0x14] */
> if ((env->features[FEAT_7_0_EBX] & CPUID_7_0_EBX_INTEL_PT)) {
> --
> 2.47.1.613.gc27f4b7a9f-goog
