Am 13. Dezember 2024 03:12:05 UTC schrieb Jamin Lin via <qemu-devel@nongnu.org>:
>According to the design of sdhci_sdma_transfer_multi_blocks, if the
>"s->blkcnt * 512" was bigger than the SDMA Buffer boundary, it break the
>while loop of data transfer and set SDHC_NISEN_DMA in the normal interrupt
>status to notify the firmware that this SDMA boundary buffer Transfer Complete
>and firmware should set the system address of the next SDMA boundary buffer
>for the remained data transfer.
>
>However, after firmware set the system address of the next SDMA boundary buffer
>in the SDMA System Address Register(0x00), SDHCI model did not restart the data
>transfer, again. Finally, firmware break the data transfer because firmware
>did not receive the either "DMA Interrupt" or "Transfer Complete Interrupt"
>from SDHCI model.
I ran into a similar problem in u-boot, too. Apparently its Freescale uSDHCI
driver expects the SD command to fill the whole buffer. Here are some thoughts:
AFAIU, the SDMA buffer needs to be big enough to hold all s->blkcnt *
s->blksize bytes and a guest would typically expect the SD command to fill the
buffer in one go (please correct me if I'm wrong). Furthermore, I believe on
real hardware the command would run in the background, allowing the guest to do
real work rather than wait. After all, the block attributes register allows for
up to 4GiB to be filled on some hardware (again, please correct me if I'm
wrong).
The problem is that sdhci_sdma_transfer_multi_blocks() blocks QEMU, i.e. does
not run in the background. If a guest asks for huge amounts of data to be
transferred, then this would disturb emulation and QEMU would freeze for a
while. To avoid that, it seems to me as if the implementation chooses to exit
the while loop prematurely, relying on the guest to poke it again. This,
unfortunately, doesn't work for all guests. So ideally,
sdhci_sdma_transfer_multi_blocks() should read all data and run in the
background, e.g. in a thread or in even in a coroutine? What do you think?
Best regards,
Bernhard
>
>Error log from u-boot
>```
>sdhci_transfer_data: Transfer data timeout
> ** fs_devread read error - block
>```
>
>According to the following mention from SDMA System Address Register of SDHCI
>spec,
>'''
>This register contains the system memory address for an SDMA transfer in
>32-bit addressing mode. When the Host Controller stops an SDMA transfer,
>this register shall point to the system address of the next contiguous data
>position.
>It can be accessed only if no transaction is executing (i.e., after a
>transaction
>has stopped). Reading this register during SDMA transfers may return an
>invalid value.
>The Host Driver shall initialize this register before starting an SDMA
>transaction.
>After SDMA has stopped, the next system address of the next contiguous
>data position can be read from this register.
>The SDMA transfer waits at the every boundary specified by the SDMA
>Buffer Boundary in the Block Size register. The Host Controller generates
>DMA Interrupt to request the Host Driver to update this register. The Host
>Driver sets the next system address of the next data position to this register.
>When the most upper byte of this register (003h) is written, the Host
>Controller
>restarts the SDMA transfer.
>''',
>
>restart the data transfer if firmware writes the most upper byte of SDMA System
>Address, s->blkcnt is bigger than 0 and SDHCI is in the data transfer state.
>
>Signed-off-by: Jamin Lin <jamin_...@aspeedtech.com>
>---
> hw/sd/sdhci.c | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
>diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
>index f1a329fdaf..a632177735 100644
>--- a/hw/sd/sdhci.c
>+++ b/hw/sd/sdhci.c
>@@ -1180,6 +1180,18 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val,
>unsigned size)
> sdhci_sdma_transfer_single_block(s);
> }
> }
>+ } else if (TRANSFERRING_DATA(s->prnsts)) {
>+ s->sdmasysad = (s->sdmasysad & mask) | value;
>+ MASKED_WRITE(s->sdmasysad, mask, value);
>+ /* restarts the SDMA transfer if the most upper byte is written */
>+ if ((s->sdmasysad & 0xFF000000) && s->blkcnt &&
>+ SDHC_DMA_TYPE(s->hostctl1) == SDHC_CTRL_SDMA) {
>+ if (s->trnmod & SDHC_TRNS_MULTI) {
>+ sdhci_sdma_transfer_multi_blocks(s);
>+ } else {
>+ sdhci_sdma_transfer_single_block(s);
>+ }
>+ }
> }
> break;
> case SDHC_BLKSIZE:
