Ivan Klokov <ivan.klo...@syntacore.com> writes: > These patches add functionality for unit testing RISC-V-specific registers. > The first patch adds a Qtest backend, and the second implements a simple test. > > --- > v8: > - Delete RFC label. > v7: > - Fix build errors, add Reviewed-by, Acked-by. > --- > > Ivan Klokov (2): > target/riscv: Add RISC-V CSR qtest support > tests/qtest: QTest example for RISC-V CSR register > > hw/riscv/riscv_hart.c | 56 ++++++++++++++++++++++++++++++++++++ > tests/qtest/libqtest.c | 27 +++++++++++++++++ > tests/qtest/libqtest.h | 14 +++++++++ > tests/qtest/meson.build | 2 +- > tests/qtest/riscv-csr-test.c | 56 ++++++++++++++++++++++++++++++++++++ > 5 files changed, 154 insertions(+), 1 deletion(-) > create mode 100644 tests/qtest/riscv-csr-test.c
Hi, there are some CI jobs failing with this series, could you take a look? https://gitlab.com/farosas/qemu/-/pipelines/1609210965
