is_la64 should be wired to false on LA32 build. VA32 CSR check shouldn't be performed in LA32 mode.
Signed-off-by: Jiaxun Yang <jiaxun.y...@flygoat.com> --- target/loongarch/cpu.h | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h index 4f542a3376831141d012f177dc46a0e928afc85c..a2d416b6634b7f6787c93eac2b777a2f6c71bebf 100644 --- a/target/loongarch/cpu.h +++ b/target/loongarch/cpu.h @@ -438,18 +438,26 @@ struct LoongArchCPUClass { static inline bool is_la64(CPULoongArchState *env) { +#ifdef TARGET_LOONGARCH64 return FIELD_EX32(env->cpucfg[1], CPUCFG1, ARCH) == CPUCFG1_ARCH_LA64; +#endif + return false; } static inline bool is_va32(CPULoongArchState *env) { /* VA32 if !LA64 or VA32L[1-3] */ - bool va32 = !is_la64(env); - uint64_t plv = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV); - if (plv >= 1 && (FIELD_EX64(env->CSR_MISC, CSR_MISC, VA32) & (1 << plv))) { - va32 = true; + if (is_la64(env)) { + uint64_t plv = FIELD_EX64(env->CSR_CRMD, CSR_CRMD, PLV); + + if (plv >= 1 && + extract64(FIELD_EX64(env->CSR_MISC, CSR_MISC, VA32), plv, 1)) { + return true; + } + return false; } - return va32; + + return true; } static inline void set_pc(CPULoongArchState *env, uint64_t value) -- 2.43.0