[PATCH 10/20] target/microblaze: Implement CPUClass::datapath_is_big_endian

[Philippe Mathieu-Daudé]

Implement the MicroBlaze datapath_is_big_endian() handler,
returning the value of the ENDI bit.

Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
 target/microblaze/cpu.h |  2 ++
 target/microblaze/cpu.c | 11 +++++++++++
 2 files changed, 13 insertions(+)

diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 3e5a3e5c605..dd6b61b34ba 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -412,6 +412,8 @@ void mb_tcg_init(void);
 /* Ensure there is no overlap between the two masks. */
 QEMU_BUILD_BUG_ON(MSR_TB_MASK & IFLAGS_TB_MASK);
 
+bool mb_cpu_datapath_is_big_endian(CPUState *cs);
+
 static inline void cpu_get_tb_cpu_state(CPUMBState *env, vaddr *pc,
                                         uint64_t *cs_base, uint32_t *flags)
 {
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 710eb1146c1..3a0e5713415 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -26,6 +26,7 @@
 #include "qapi/error.h"
 #include "cpu.h"
 #include "qemu/module.h"
+#include "sysemu/hw_accel.h"
 #include "hw/qdev-properties.h"
 #include "exec/exec-all.h"
 #include "exec/cpu_ldst.h"
@@ -119,6 +120,15 @@ static bool mb_cpu_has_work(CPUState *cs)
     return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI);
 }
 
+bool mb_cpu_datapath_is_big_endian(CPUState *cs)
+{
+    MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs);
+
+    cpu_synchronize_state(cs);
+
+    return !cpu->cfg.endi;
+}
+
 static int mb_cpu_mmu_index(CPUState *cs, bool ifetch)
 {
     CPUMBState *env = cpu_env(cs);
@@ -447,6 +457,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
                                        &mcc->parent_phases);
 
     cc->class_by_name = mb_cpu_class_by_name;
+    cc->datapath_is_big_endian = mb_cpu_datapath_is_big_endian;
     cc->has_work = mb_cpu_has_work;
     cc->mmu_index = mb_cpu_mmu_index;
     cc->dump_state = mb_cpu_dump_state;
-- 
2.45.2