On Thu, Oct 17, 2024 at 2:39 PM LIU Zhiwei <zhiwei_...@linux.alibaba.com> wrote:
>
>
> On 2024/10/17 11:52, Richard Henderson wrote:
> > On 10/16/24 19:57, LIU Zhiwei wrote:
> >> Hi Richard,
> >>
> >> On 2024/10/17 02:38, Richard Henderson wrote:
> >>> 2595: if (dec->cfg->ext_zcmop) {
> >>> 2690: if (dec->cfg->ext_zcmp && ((inst >> 12) & 0b01)) {
> >>> 2716: if (!dec->cfg->ext_zcmt) {
> >>> 2726: if (!dec->cfg->ext_zcmp) {
> >>> 4028: if (dec->cfg->ext_zimop) {
> >>> 5044: if (dec->cfg->ext_zfinx) {
> >>> 5051: if (dec->cfg->ext_zfinx) {
> >>> 5058: if (dec->cfg->ext_zfinx) {
> >>> 5065: if (dec->cfg->ext_zfinx) {
> >>> 5371: if (guard_func(cfg)) {
> >>>
> >>> This structure comes from RISCVCPU, a target structure.
> >> Oops. We missed this.
> >>> There is no such structure for the host, causing null pointer
> >>> dereferences.
> >>>
> >>> The zfinx references can be changed to
> >>>
> >>> dec->cfg && dec->cfg->ext_zfinx
> >>>
> >>> but some of them can simply be removed, e.g. zcmop and zimop, which
> >>> are otherwise reserved encodings.
> Yes. Maybe it is better to disassemble them as usual even when there are
> disabled or not supported.
> >>
> >> Should we probe the host feature like what we do in tcg backend
> >> support and then do the right disassemble according to the probe result?
> >
> > I don't think there's anything that is currently checked in
> > disas/riscv.c that needs to know about the host. And, as I say above,
> > some of those checks can be eliminated.
> >
> > Host disassembly needs are limited to what tcg/riscv/ emits.
>
> Agree.
Hey Zhiwei,
Did you follow up on this?
Alistair
