On Sat, Nov 30, 2024 at 12:44 AM Philippe Mathieu-Daudé
<phi...@linaro.org> wrote:
>
> Trying to make sense of these tswap64 calls I
> figured this device could be simplified.
>
> Tested using 'make check-{qtest,functional}'
> on both big/little endian hosts, no failure but
> I'm not sure the code path is covered.
>
> Philippe Mathieu-Daudé (3):
> MAINTAINERS: Cover RISC-V HTIF interface
> hw/char/riscv_htif: Explicit little-endian implementation
> hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses
Thanks!
Applied to riscv-to-apply.next
Alistair
>
> MAINTAINERS | 2 ++
> hw/char/riscv_htif.c | 15 ++++++++++-----
> 2 files changed, 12 insertions(+), 5 deletions(-)
>
> --
> 2.45.2
>
>
