Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
target/mips/tcg/tcg-internal.h | 6 +++---
target/mips/cpu.c | 2 +-
target/mips/tcg/sysemu/tlb_helper.c | 29 ++++++++++++++++++++---------
3 files changed, 24 insertions(+), 13 deletions(-)
diff --git a/target/mips/tcg/tcg-internal.h b/target/mips/tcg/tcg-internal.h
index aef032c48d..f4b00354af 100644
--- a/target/mips/tcg/tcg-internal.h
+++ b/target/mips/tcg/tcg-internal.h
@@ -61,9 +61,9 @@ void mips_cpu_do_transaction_failed(CPUState *cs, hwaddr
physaddr,
MemTxResult response, uintptr_t retaddr);
void cpu_mips_tlb_flush(CPUMIPSState *env);
-bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
+bool mips_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr address,
+ MMUAccessType access_type, int mmu_idx,
+ MemOp memop, int size, bool probe, uintptr_t ra);
void mips_semihosting(CPUMIPSState *env);
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index d0a43b6d5c..3a453c9285 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -556,7 +556,7 @@ static const TCGCPUOps mips_tcg_ops = {
.restore_state_to_opc = mips_restore_state_to_opc,
#if !defined(CONFIG_USER_ONLY)
- .tlb_fill = mips_cpu_tlb_fill,
+ .tlb_fill_align = mips_cpu_tlb_fill_align,
.cpu_exec_interrupt = mips_cpu_exec_interrupt,
.cpu_exec_halt = mips_cpu_has_work,
.do_interrupt = mips_cpu_do_interrupt,
diff --git a/target/mips/tcg/sysemu/tlb_helper.c
b/target/mips/tcg/sysemu/tlb_helper.c
index e98bb95951..ac76396525 100644
--- a/target/mips/tcg/sysemu/tlb_helper.c
+++ b/target/mips/tcg/sysemu/tlb_helper.c
@@ -904,15 +904,28 @@ refill:
}
#endif
-bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
+bool mips_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr address,
+ MMUAccessType access_type, int mmu_idx,
+ MemOp memop, int size,
+ bool probe, uintptr_t retaddr)
{
CPUMIPSState *env = cpu_env(cs);
hwaddr physical;
int prot;
int ret = TLBRET_BADADDR;
+ if (address & ((1 << memop_alignment_bits(memop)) - 1)) {
+ if (probe) {
+ return false;
+ }
+ mips_cpu_do_unaligned_access(cs, address, access_type,
+ mmu_idx, retaddr);
+ }
+
+ memset(out, 0, sizeof(*out));
+ out->attrs = MEMTXATTRS_UNSPECIFIED;
+ out->lg_page_size = TARGET_PAGE_BITS;
+
/* data access */
/* XXX: put correct access by using cpu_restore_state() correctly */
ret = get_physical_address(env, &physical, &prot, address,
@@ -930,9 +943,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
break;
}
if (ret == TLBRET_MATCH) {
- tlb_set_page(cs, address & TARGET_PAGE_MASK,
- physical & TARGET_PAGE_MASK, prot,
- mmu_idx, TARGET_PAGE_SIZE);
+ out->phys_addr = physical;
+ out->prot = prot;
return true;
}
#if !defined(TARGET_MIPS64)
@@ -948,9 +960,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
ret = get_physical_address(env, &physical, &prot, address,
access_type, mmu_idx);
if (ret == TLBRET_MATCH) {
- tlb_set_page(cs, address & TARGET_PAGE_MASK,
- physical & TARGET_PAGE_MASK, prot,
- mmu_idx, TARGET_PAGE_SIZE);
+ out->phys_addr = physical;
+ out->prot = prot;
return true;
}
}
