On Mon, 4 Nov 2024 at 10:53, Philippe Mathieu-Daudé <phi...@linaro.org> wrote: > > The following changes since commit 92ec7805190313c9e628f8fc4eb4f932c15247bd: > > Merge tag 'pull-riscv-to-apply-20241031-1' of > https://github.com/alistair23/qemu into staging (2024-10-31 16:34:25 +0000) > > are available in the Git repository at: > > https://github.com/philmd/qemu.git tags/mips-20241104 > > for you to fetch changes up to a144a3baa61e3fca1a7946685128c349dd92c76f: > > target/mips: Remove unused CPUMIPSState::current_fpu field (2024-11-03 > 05:52:49 -0300) > > ---------------------------------------------------------------- > MIPS patches queue > > - Migrate missing CP0 TLB MemoryMapID register (Yongbok) > - Enable MSA ASE for mips32r6-generic (Aleksandar) > - Convert Loongson LEXT opcodes to decodetree (Philippe) > - Introduce ase_3d_available and disas_mt_available helpers (Philippe) >
Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/9.2 for any user-visible changes. -- PMM
