From: Igor Mammedov <niall...@gmail.com>
cpu should know if it should be halted after reset. so move
this decision form pc.c into cpu.c.
patch is based on Jan Kiszka's proposal:
http://thread.gmane.org/gmane.comp.emulators.qemu/100806
Signed-off-by: Igor Mammedov <niall...@gmail.com>
---
hw/apic.h | 2 +-
hw/apic_common.c | 18 ++++++++++++------
hw/pc.c | 11 ++++-------
target-i386/cpu.c | 2 ++
target-i386/helper.c | 1 -
target-i386/kvm.c | 5 +++--
6 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/hw/apic.h b/hw/apic.h
index 62179ce..d961ed4 100644
--- a/hw/apic.h
+++ b/hw/apic.h
@@ -20,9 +20,9 @@ void apic_init_reset(DeviceState *s);
void apic_sipi(DeviceState *s);
void apic_handle_tpr_access_report(DeviceState *d, target_ulong ip,
TPRAccess access);
+void apic_designate_bsp(DeviceState *d);
/* pc.c */
-int cpu_is_bsp(CPUX86State *env);
DeviceState *cpu_get_current_apic(void);
#endif
diff --git a/hw/apic_common.c b/hw/apic_common.c
index 9774cf6..31b46ab 100644
--- a/hw/apic_common.c
+++ b/hw/apic_common.c
@@ -43,8 +43,8 @@ uint64_t cpu_get_apic_base(DeviceState *d)
trace_cpu_get_apic_base((uint64_t)s->apicbase);
return s->apicbase;
} else {
- trace_cpu_get_apic_base(0);
- return 0;
+ trace_cpu_get_apic_base(MSR_IA32_APICBASE_BSP);
+ return MSR_IA32_APICBASE_BSP;
}
}
@@ -201,22 +201,28 @@ void apic_init_reset(DeviceState *d)
s->timer_expiry = -1;
}
+void apic_designate_bsp(DeviceState *d)
+{
+ if (d) {
+ APICCommonState *s = APIC_COMMON(d);
+ s->apicbase |= MSR_IA32_APICBASE_BSP;
+ }
+}
+
static void apic_reset_common(DeviceState *d)
{
APICCommonState *s = DO_UPCAST(APICCommonState, busdev.qdev, d);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
- bool bsp;
- bsp = cpu_is_bsp(s->cpu_env);
s->apicbase = 0xfee00000 |
- (bsp ? MSR_IA32_APICBASE_BSP : 0) | MSR_IA32_APICBASE_ENABLE;
+ (s->apicbase & MSR_IA32_APICBASE_BSP) | MSR_IA32_APICBASE_ENABLE;
s->vapic_paddr = 0;
info->vapic_base_update(s);
apic_init_reset(d);
- if (bsp) {
+ if (s->apicbase & MSR_IA32_APICBASE_BSP) {
/*
* LINT0 delivery mode on CPU #0 is set to ExtInt at initialization
* time typically by BIOS, so PIC interrupt can be delivered to the
diff --git a/hw/pc.c b/hw/pc.c
index 67f0479..d2c122e 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -869,12 +869,6 @@ void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
nb_ne2k++;
}
-int cpu_is_bsp(CPUX86State *env)
-{
- /* We hard-wire the BSP to the first CPU. */
- return env->cpu_index == 0;
-}
-
DeviceState *cpu_get_current_apic(void)
{
if (cpu_single_env) {
@@ -929,7 +923,6 @@ static void pc_cpu_reset(void *opaque)
CPUX86State *env = opaque;
cpu_state_reset(env);
- env->halted = !cpu_is_bsp(env);
}
static CPUX86State *pc_new_cpu(const char *cpu_model)
@@ -943,6 +936,10 @@ static CPUX86State *pc_new_cpu(const char *cpu_model)
}
if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
env->apic_state = apic_init(env, env->cpuid_apic_id);
+ /* We hard-wire the BSP to the first CPU. */
+ if (env->cpu_index == 0) {
+ apic_designate_bsp(env->apic_state);
+ }
}
qemu_register_reset(pc_cpu_reset, env);
pc_cpu_reset(env);
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 3df53ca..e12c851 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -1448,6 +1448,8 @@ static void x86_cpu_reset(CPUState *s)
env->dr[7] = DR7_FIXED_1;
cpu_breakpoint_remove_all(env, BP_CPU);
cpu_watchpoint_remove_all(env, BP_CPU);
+
+ env->halted = !(cpu_get_apic_base(env->apic_state) &
MSR_IA32_APICBASE_BSP);
}
static void mce_init(X86CPU *cpu)
diff --git a/target-i386/helper.c b/target-i386/helper.c
index 87954f0..d92d3d4 100644
--- a/target-i386/helper.c
+++ b/target-i386/helper.c
@@ -1196,7 +1196,6 @@ void do_cpu_init(CPUX86State *env)
env->interrupt_request = sipi;
env->pat = pat;
apic_init_reset(env->apic_state);
- env->halted = !cpu_is_bsp(env);
}
void do_cpu_sipi(CPUX86State *env)
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index e74a9e4..a361ab7 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -583,8 +583,9 @@ void kvm_arch_reset_vcpu(CPUX86State *env)
env->interrupt_injected = -1;
env->xcr0 = 1;
if (kvm_irqchip_in_kernel()) {
- env->mp_state = cpu_is_bsp(env) ? KVM_MP_STATE_RUNNABLE :
- KVM_MP_STATE_UNINITIALIZED;
+ env->mp_state =
+ cpu_get_apic_base(env->apic_state) & MSR_IA32_APICBASE_BSP ?
+ KVM_MP_STATE_RUNNABLE : KVM_MP_STATE_UNINITIALIZED;
} else {
env->mp_state = KVM_MP_STATE_RUNNABLE;
}
--
1.7.7.6
