Hi Daniel, Let's try to push it before EOY. I'm planning to start working on it in the first half of November. Does that work for you?
Thanks вт, 29 окт. 2024 г. в 20:40, Daniel Henrique Barboza < dbarb...@ventanamicro.com>: > Hi Alexey, > > > Do you have plans to post a new version of this series? Aside from a few > comments > it seems like this was almost there. > > We might not be able to get it merged in time for this current release > (code freeze > is Nov 5th) but we can get it in Alistair's tree for the next release. > > > Thanks, > > Daniel > > On 5/11/24 7:10 AM, Alexey Baturo wrote: > > From: Alexey Baturo <baturo.ale...@gmail.com> > > > > Hi, > > > > It looks like Pointer Masking spec has reached v1.0 and been frozen, > > rebasing on riscv-to-apply.next branch and resubmitting patches. > > > > Thanks. > > > > [v8]: > > Rebasing patches on current qemu branch and resubmitting them. > > > > > > [v7]: > > I'm terribly sorry, but previous rebase went wrong and somehow I missed > it. > > This time I double-checked rebased version. > > This patch series is properly rebased on > https://github.com/alistair23/qemu/tree/riscv-to-apply.next > > > > [v6]: > > This patch series is rebased on > https://github.com/alistair23/qemu/tree/riscv-to-apply.next > > > > [v5]: > > This patch series targets Zjpm v0.8 extension. > > The spec itself could be found here: > https://github.com/riscv/riscv-j-extension/blob/8088461d8d66a7676872b61c908cbeb7cf5c5d1d/zjpm-spec.pdf > > This patch series is updated after the suggested comments: > > - add "x-" to the extension names to indicate experimental > > > > [v4]: > > Patch series updated after the suggested comments: > > - removed J-letter extension as it's unused > > - renamed and fixed function to detect if address should be sign-extended > > - zeroed unused context variables and moved computation logic to another > patch > > - bumped pointer masking version_id and minimum_version_id by 1 > > > > [v3]: > > There patches are updated after Richard's comments: > > - moved new tb flags to the end > > - used tcg_gen_(s)extract to get the final address > > - properly handle CONFIG_USER_ONLY > > > > [v2]: > > As per Richard's suggestion I made pmm field part of tb_flags. > > It allowed to get rid of global variable to store pmlen. > > Also it allowed to simplify all the machinery around it. > > > > [v1]: > > It looks like Zjpm v0.8 is almost frozen and we don't expect it change > drastically anymore. > > Compared to the original implementation with explicit base and mask > CSRs, we now only have > > several fixed options for number of masked bits which are set using > existing CSRs. > > The changes have been tested with handwritten assembly tests and LLVM > HWASAN > > test suite. > > > > Alexey Baturo (6): > > target/riscv: Remove obsolete pointer masking extension code. > > target/riscv: Add new CSR fields for S{sn,mn,m}pm extensions as part > > of Zjpm v0.8 > > target/riscv: Add helper functions to calculate current number of > > masked bits for pointer masking > > target/riscv: Add pointer masking tb flags > > target/riscv: Update address modify functions to take into account > > pointer masking > > target/riscv: Enable updates for pointer masking variables and thus > > enable pointer masking extension > > > > target/riscv/cpu.c | 21 +-- > > target/riscv/cpu.h | 46 +++-- > > target/riscv/cpu_bits.h | 90 +--------- > > target/riscv/cpu_cfg.h | 3 + > > target/riscv/cpu_helper.c | 97 +++++----- > > target/riscv/csr.c | 337 ++--------------------------------- > > target/riscv/machine.c | 20 +-- > > target/riscv/pmp.c | 13 +- > > target/riscv/pmp.h | 11 +- > > target/riscv/tcg/tcg-cpu.c | 5 +- > > target/riscv/translate.c | 46 ++--- > > target/riscv/vector_helper.c | 15 +- > > 12 files changed, 158 insertions(+), 546 deletions(-) > > >
