Hi Aleksandar,
On 18/10/24 10:19, Aleksandar Rakic wrote:
Add emulation of MIPS' CRC32 (Cyclic Redundancy Check) instructions.
Reuse zlib crc32() and Linux crc32c().
Cherry-picked 4cc974938aee1588f852590509004e340c072940
from https://github.com/MIPS/gnutools-qemu
Signed-off-by: Yongbok Kim <yongbok....@mips.com>
Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
Signed-off-by: Aleksandar Rakic <aleksandar.ra...@htecgroup.com>
---
target/mips/helper.h | 2 ++
target/mips/meson.build | 1 +
target/mips/tcg/op_helper.c | 26 ++++++++++++++++++++++++++
target/mips/tcg/translate.c | 37 +++++++++++++++++++++++++++++++++++++
target/mips/tcg/translate.h | 1 +
5 files changed, 67 insertions(+)
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 333469b268..256fa0893e 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -430,6 +430,7 @@ enum {
OPC_LWE = 0x2F | OPC_SPECIAL3,
/* R6 */
+ OPC_CRC32 = 0x0F | OPC_SPECIAL3,
R6_OPC_PREF = 0x35 | OPC_SPECIAL3,
R6_OPC_CACHE = 0x25 | OPC_SPECIAL3,
R6_OPC_LL = 0x36 | OPC_SPECIAL3,
@@ -13705,6 +13730,17 @@ static void decode_opc_special3_r6(CPUMIPSState *env,
DisasContext *ctx)
op1 = MASK_SPECIAL3(ctx->opcode);
switch (op1) {
+ case OPC_CRC32:
+ if (unlikely(!ctx->crcp) ||
+ unlikely((extract32(ctx->opcode, 6, 2) == 3) &&
+ (!(ctx->hflags & MIPS_HFLAG_64))) ||
+ unlikely((extract32(ctx->opcode, 8, 3) >= 2))) {
+ gen_reserved_instruction(ctx);
+ }
+ gen_crc32(ctx, rt, rs, rt,
+ extract32(ctx->opcode, 6, 2),
+ extract32(ctx->opcode, 8, 3));
+ break;
New opcode must be implemented in decodetree format, please
add these in target/mips/tcg/rel6* files (the change should be
trivial and should only involve modifying few lines -- see for
example commit 675bf34a6fe and around).
Thanks,
Phil.