On 10/9/24 10:10, Richard Henderson wrote:
On 10/9/24 09:27, BALATON Zoltan wrote:
On Wed, 9 Oct 2024, Richard Henderson wrote:
Based-on: 20241009000453.315652-1-richard.hender...@linaro.org
("[PATCH v3 00/20] accel/tcg: Introduce tlb_fill_align hook")
The initial idea was: how much can we do with an intelligent data
structure for the same cost as a linear search through an array?
This is an initial installment along these lines. This is about
as far as I can go without first converting all targets to the
new tlb_fill_align hook. Indeed, the final two patches will not
compile with all targets enabled, but hint at the direction of
the next steps.
I do not expect large perf changes with this patch set. I will
be happy if performance comes out even.
Then what's the point?
Eventually fixing the page size > TARGET_PAGE_SIZE performance issues.
E.g. with a 16k or 64k aarch64 guest kernel, we still have TARGET_PAGE_SIZE at
4k, so all
guest pages are "large", and so run into our current behaviour of flushing the
entire tlb
too often.
Even without that, I expect further cleanups to improve performance, we're just
not there yet.
r~
Does merging pages over a given range be something we could benefit from
too? In this case, entries in our tlbtree would have varying size,
allowing us to cover more space with a single entry.
It would allow us to have a more shallow tlbtree (given that it's
rebalanced when modified) and speed up walking operations.
I'm not sure if it can help performance wise though.
