Il 13/04/2012 10:12, Peter Maydell ha scritto: > Half a dozen from random grep: > "xilinx,timer" -- memory region size depends on a property > "lan9118" -- which MemoryRegionOps we use for the region depends > on the "mode_16bit" property.
You can set these at realize time, before the memory region itself is realized (realization uses pre-order for this reason). > "SUNW,tcx" -- number of memory regions depend on depth property The regions can still exist in the device, whether they're mapped depends on the depth property. > "a9mpcore_priv" (and its equivalents for a15, 11mpcore, etc) > "arm_mptimer" -- number of regions and irqs depends on 'num-cpu' prop Why wouldn't you model this as a parent SoC object with either: - 1 GIC child, N CPU children, N MPTimer children, and N GICInterface children (with links to the GIC); - or 1 GIC + N CPU children, each of the latter having 1 MPTimer child and 1 GICInterface child (with links to the GIC); > "grlib,gptimer" -- number of irqs depends on "nr-timers" prop This one is a good example. Paolo
