On 9/30/24 02:10, Philippe Mathieu-Daudé wrote:
Add the "big-endian" property and set the CP0C0_BE bit in CP0_Config0.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
target/mips/cpu.h | 3 +++
target/mips/cpu.c | 9 ++++++++-
2 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index 3e906a175a..070e11fe0d 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -1209,6 +1209,9 @@ struct ArchCPU {
Clock *clock;
Clock *count_div; /* Divider for CP0_Count clock */
+
+ /* Properties */
+ bool is_big_endian;
};
/**
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 89655b1900..982f5bb4e2 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -200,7 +200,8 @@ static void mips_cpu_reset_hold(Object *obj, ResetType type)
/* Reset registers to their default values */
env->CP0_PRid = env->cpu_model->CP0_PRid;
- env->CP0_Config0 = env->cpu_model->CP0_Config0;
+ env->CP0_Config0 = deposit32(env->cpu_model->CP0_Config0,
+ CP0C0_BE, 1, cpu->is_big_endian);
#if TARGET_BIG_ENDIAN
env->CP0_Config0 |= (1 << CP0C0_BE);
#endif
Missed removing this ifdef.
r~
