>-----Original Message----- >From: Jason Wang <jasow...@redhat.com> >Subject: Re: [PATCH v3 08/17] intel_iommu: Set accessed and dirty bits >during first stage translation > >On Wed, Sep 11, 2024 at 1:26 PM Zhenzhong Duan ><zhenzhong.d...@intel.com> wrote: >> >> From: Clément Mathieu--Drif <clement.mathieu--d...@eviden.com> >> >> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--d...@eviden.com> >> Signed-off-by: Zhenzhong Duan <zhenzhong.d...@intel.com> >> --- >> hw/i386/intel_iommu_internal.h | 3 +++ >> hw/i386/intel_iommu.c | 25 ++++++++++++++++++++++++- >> 2 files changed, 27 insertions(+), 1 deletion(-) >> >> diff --git a/hw/i386/intel_iommu_internal.h >b/hw/i386/intel_iommu_internal.h >> index 668583aeca..7786ef7624 100644 >> --- a/hw/i386/intel_iommu_internal.h >> +++ b/hw/i386/intel_iommu_internal.h >> @@ -324,6 +324,7 @@ typedef enum VTDFaultReason { >> >> /* Output address in the interrupt address range for scalable mode */ >> VTD_FR_SM_INTERRUPT_ADDR = 0x87, >> + VTD_FR_FS_BIT_UPDATE_FAILED = 0x91, /* SFS.10 */ >> VTD_FR_MAX, /* Guard */ >> } VTDFaultReason; >> >> @@ -549,6 +550,8 @@ typedef struct VTDRootEntry VTDRootEntry; >> /* Masks for First Level Paging Entry */ >> #define VTD_FL_P 1ULL >> #define VTD_FL_RW_MASK (1ULL << 1) >> +#define VTD_FL_A 0x20 >> +#define VTD_FL_D 0x40 > >Nit: let's use _MASK suffix to all or not.
Will use: #define VTD_FL_P 1ULL #define VTD_FL_RW_MASK (1ULL << 1) #define VTD_FL_A_MASK (1ULL << 5) #define VTD_FL_D_MASK (1ULL << 6) Thanks Zhenzhong