The following changes since commit 14556211bc6d7125a44d5b5df90caba019b0ec0e:
Merge tag 'qemu-macppc-20240918' of https://github.com/mcayland/qemu into staging (2024-09-18 20:59:10 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240919 for you to fetch changes up to 89b30b4921e51bb47313d2d8fdc3d7bce987e4c5: docs/devel: Remove nested-papr.txt (2024-09-19 13:33:15 +0100) ---------------------------------------------------------------- target-arm queue: * target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1 * target/arm: More conversions to decodetree of A64 SIMD insns * hw/char/stm32l4x5_usart.c: Enable USART ACK bit response * tests: update aarch64/sbsa-ref tests * kvm: minor Coverity nit fixes * docs/devel: Remove nested-papr.txt ---------------------------------------------------------------- Jacob Abrams (1): hw/char/stm32l4x5_usart.c: Enable USART ACK bit response Marcin Juszkiewicz (4): tests: use default cpu for aarch64/sbsa-ref tests: add FreeBSD tests for aarch64/sbsa-ref tests: expand timeout information for aarch64/sbsa-ref tests: drop OpenBSD tests for aarch64/sbsa-ref Peter Maydell (4): kvm: Make 'mmap_size' be 'int' in kvm_init_vcpu(), do_kvm_destroy_vcpu() kvm: Remove unreachable code in kvm_dirty_ring_reaper_thread() target/arm: Correct ID_AA64ISAR1_EL1 value for neoverse-v1 docs/devel: Remove nested-papr.txt Richard Henderson (29): target/arm: Replace tcg_gen_dupi_vec with constants in gengvec.c target/arm: Replace tcg_gen_dupi_vec with constants in translate-sve.c target/arm: Use cmpsel in gen_ushl_vec target/arm: Use cmpsel in gen_sshl_vec target/arm: Use tcg_gen_extract2_i64 for EXT target/arm: Convert EXT to decodetree target/arm: Convert TBL, TBX to decodetree target/arm: Convert UZP, TRN, ZIP to decodetree target/arm: Simplify do_reduction_op target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree target/arm: Convert FMOVI (scalar, immediate) to decodetree target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr target/arm: Fix whitespace near gen_srshr64_i64 target/arm: Convert handle_vec_simd_shri to decodetree target/arm: Convert handle_vec_simd_shli to decodetree target/arm: Use {, s}extract in handle_vec_simd_wshli target/arm: Convert SSHLL, USHLL to decodetree target/arm: Push tcg_rnd into handle_shri_with_rndacc target/arm: Split out subroutines of handle_shri_with_rndacc target/arm: Convert SHRN, RSHRN to decodetree target/arm: Convert handle_scalar_simd_shri to decodetree target/arm: Convert handle_scalar_simd_shli to decodetree target/arm: Convert VQSHL, VQSHLU to gvec target/arm: Widen NeonGenNarrowEnvFn return to 64 bits target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree target/arm: Convert vector [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree target/arm: Convert scalar [US]QSHRN, [US]QRSHRN, SQSHRUN to decodetree docs/devel/nested-papr.txt | 119 -- target/arm/helper.h | 34 +- target/arm/tcg/translate.h | 14 +- target/arm/tcg/a64.decode | 257 ++++ target/arm/tcg/neon-dp.decode | 6 +- accel/kvm/kvm-all.c | 10 +- hw/char/stm32l4x5_usart.c | 16 + target/arm/tcg/cpu64.c | 2 +- target/arm/tcg/gengvec.c | 121 +- target/arm/tcg/neon_helper.c | 76 +- target/arm/tcg/translate-a64.c | 2081 +++++++++++++----------------- target/arm/tcg/translate-neon.c | 179 +-- target/arm/tcg/translate-sve.c | 128 +- tests/qtest/stm32l4x5_usart-test.c | 36 +- tests/functional/test_aarch64_sbsaref.py | 58 +- 15 files changed, 1479 insertions(+), 1658 deletions(-) delete mode 100644 docs/devel/nested-papr.txt
