Re: [PATCH v7 13/17] target/riscv: update `decode_save_opc` to store extra word2

[Deepak Gupta]

On Thu, Aug 22, 2024 at 01:24:59AM -0700, Deepak Gupta wrote:

Extra word 2 is stored during tcg compile and `decode_save_opc` needs
additional argument in order to pass the value. This will be used during
unwind to get extra information about instruction like how to massage
exceptions. Updated all callsites as well.

Signed-off-by: Deepak Gupta <de...@rivosinc.com>
---
target/riscv/insn_trans/trans_privileged.c.inc |  8 ++++----
target/riscv/insn_trans/trans_rva.c.inc        |  4 ++--
target/riscv/insn_trans/trans_rvd.c.inc        |  4 ++--
target/riscv/insn_trans/trans_rvf.c.inc        |  4 ++--
target/riscv/insn_trans/trans_rvh.c.inc        |  8 ++++----
target/riscv/insn_trans/trans_rvi.c.inc        |  6 +++---
target/riscv/insn_trans/trans_rvvk.c.inc       | 10 +++++-----
target/riscv/insn_trans/trans_rvzacas.c.inc    |  4 ++--
target/riscv/insn_trans/trans_rvzfh.c.inc      |  4 ++--
target/riscv/insn_trans/trans_svinval.c.inc    |  6 +++---
target/riscv/translate.c                       | 11 ++++++-----
11 files changed, 35 insertions(+), 34 deletions(-)


@@ -1096,7 +1097,7 @@ static bool gen_amo(DisasContext *ctx, arg_atomic *a,
        mop |= MO_ALIGN;
    }

-    decode_save_opc(ctx);
+    decode_save_opc(ctx, RISCV_UW2_ALWAYS_STORE_AMO);
    src1 = get_address(ctx, a->rs1, 0);
    func(dest, src1, src2, ctx->mem_idx, mop);

@@ -1110,7 +1111,7 @@ static bool gen_cmpxchg(DisasContext *ctx, arg_atomic *a, 
MemOp mop)
    TCGv src1 = get_address(ctx, a->rs1, 0);
    TCGv src2 = get_gpr(ctx, a->rs2, EXT_NONE);

-    decode_save_opc(ctx);
+    decode_save_opc(ctx, 0);

Note for myself. I missed this one to set `RISCV_UW2_ALWAYS_STORE_AMO`
Will wait for other feedback and fix it in v8.

    tcg_gen_atomic_cmpxchg_tl(dest, src1, dest, src2, ctx->mem_idx, mop);

    gen_set_gpr(ctx, a->rd, dest);
--
2.44.0